MK22DX128VLK5557 vs MK21DX256AVLK5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng MK22DX128VLK5557 sa pamamagitan ng NXP Semiconductors at MK21DX256AVLK5 sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
NXP Semiconductors
MK22DX128VLK5557 - 50MHz Cortex-M4 MCU, 128KB Flash | NXP
MK22DX128VLK5557 ✓ NakahandaNXP Semiconductors
MK21DX256AVLK5 - 50MHz Cortex-M4 MCU 256KB Flash | NXP
MK21DX256AVLK5 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | MK22DX128VLK5557 | MK21DX256AVLK5 |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Core Architecture | ARM Cortex-M4 | — |
| Core Count | Single-core 32-bit | — |
| Maximum CPU Frequency | 50 MHz | — |
| Program Memory (Flash) | 128 KB (128K x 8) | — |
| Supply Voltage na Operasyon | 1.71 V to 3.6 V | — |
| Packhaging | 80-LQFP (12x12 mm) | 80-LQFP (12x12 mm), FQFP square, gull-wing terminals |
| GPIO Count | 56 I/O lines | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| ADC | 12-bit / 16-bit channels (per family) | — |
| USB | USB 2.0 Full-Speed Device/Host/OTG | Full-Speed USB |
| Communication Interfaces | CAN, I2C, SPI, UART | — |
| DMA | 16 channels | — |
| AES Hardware | Hardware AES encryption accelerator | — |
| Series | Kinetis K20 | Kinetis K2x (K2 USB Series, K Family) |
| Tindminan RoHS | Compliant | — |
| Core | — | ARM Cortex-M4 |
| Core Size | — | 32-bit |
| Maksimum na Taktiko ng Oras | — | 50 MHz |
| Flash Memory | — | 256 KB |
| SRAM | — | 64 KB |
| Volte ng Pagbibigay | — | 1.8 V / 2.5 V / 3.3 V |
| Number of Pins / Terminals | — | 80 |
| Security Features | — | Hardware encryption and tamper detection (DryIce) |
| Temperature Grade | — | Industrial |
| Packaging | — | Tray |
| Program Memory Type | — | FLASH |
| RISC Architecture | — | Yes |