MPC8536EAVTAULA557 vs MPC8536EAVTAULA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng MPC8536EAVTAULA557 sa pamamagitan ng NXP Semiconductors at MPC8536EAVTAULA sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
NXP Semiconductors
MPC8536EAVTAULA557 - PowerQUICC III e500 MPU, 1.333GHz, FCPBGA-783 | NXP
MPC8536EAVTAULA557 ✓ NakahandaNXP Semiconductors
MPC8536EAVTAULA - PowerQUICC III e500 SoC 1.333GHz 783-FCPBGA
MPC8536EAVTAULA NrndPagsanggunian na paghahambing
| Parametro | MPC8536EAVTAULA557 | MPC8536EAVTAULA |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Core Architecture | PowerPC e500 | Power Architecture e500 |
| Family | PowerQUICC III (MPC85xx) | — |
| Number of Cores | 1 | 1 |
| Data Width | 32-bit | — |
| Maximum Core Frequency | 1.333 GHz | — |
| L1 Instruction Cache | 32 KB | — |
| L1 Data Cache | 32 KB | — |
| L2 Cache | 256 KB | — |
| Packhaging | 783-FCPBGA (29 mm x 29 mm) | 783-FCPBGA (29 mm x 29 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (FC-PBGA) |
| Memory Controller | DDR2 with ECC support | — |
| Ethernet MACs | Dual 10/100/1 GbE | — |
| PCI Express | PCIe x4 | — |
| Security Engine | SEC 3.0 (AES, 3DES, SHA, MD5) | — |
| DMA Channels | 4 | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Width ng Data Bus | — | 32-bit |
| Maksimum na Taktiko ng Oras | — | 1.333 GHz |
| Hanay ng Temperature na Operasyon | — | 0 C to +90 C |
| Primary Peripherals | — | DDR2/DDR3 ctrl, 4x GbE, 2x SATA, 2x PCIe, USB 2.0, PCI, SD/MMC, I2C, SPI, UART |
| Encryption Accelerator | — | SEC 3.x (AES, 3DES, RSA, ECC, Kasumi) |
| IEEE 1588 Hardware Timestamping | — | Supported |
| L1 Cache | — | 32 KB instruction + 32 KB data (parity protected) |
| FPU / DSP Extensions | — | Double-precision FPU and SPE (Signal Processing Engine) |
| DDR Memory Support | — | DDR2 up to 533 MHz; DDR3 with ECC |
| Package Pin Count | — | 783 |
| Product Longevity Program | — | Included (10-year supply per NXP) |