P2020NXE2HHC vs P2010NXE2KHC Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng P2020NXE2HHC sa pamamagitan ng NXP Semiconductors at P2010NXE2KHC sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

NXP Semiconductors
P2020NXE2HHC P2020NXE2HHC - QorIQ Dual-Core 1.2GHz Power Arch SoC | NXP

P2020NXE2HHC - QorIQ Dual-Core 1.2GHz Power Arch SoC | NXP

P2020NXE2HHC ⚠ Huling Pagbili
NXP Semiconductors
P2010NXE2KHC P2010NXE2KHC - QorIQ P2 1-Core 1.2GHz Power Arch SoC | NXP

P2010NXE2KHC - QorIQ P2 1-Core 1.2GHz Power Arch SoC | NXP

P2010NXE2KHC ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro P2020NXE2HHC P2010NXE2KHC
Brand NXP Semiconductors NXP Semiconductors
Kategorya Microcontrollers Microcontrollers
Katayuan ng Lifecycle Huling Pagbili Huling Pagbili
Processor Type PowerPC e500v2 Microprocessor IC QorIQ P2 —
Core Architecture Power Architecture e500v2, dual-core Power Architecture e500v2 (Book E)
Core Count 2 —
Operating Frequency 1.2 GHz (800 MHz/800 MHz core config per NXP marketing code) —
L1 Cache 32 KB instruction + 32 KB data per core —
L2 Cache 256 KB unified —
Memory Controller DDR2/DDR3 with ECC support DDR2/DDR3 with ECC
Ethernet 3x Gigabit Ethernet with IEEE 1588 Quad GbE MAC
PCI Express 3x PCIe Gen 1/Gen 2 controllers 2 x PCIe controllers
Serial RapidIO 2x SRIO ports —
USB 2x USB 2.0 with integrated PHY USB 2.0 (ULPI interface)
Security Engine SEC 4.0 (IPsec/SSL/3GPP acceleration) —
Packhaging 689-TEPBGA II (31x31 mm) 689-TEPBGA II (31x31 mm)
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount (BGA)
Temperature na Operasyon -40C to +125C -40C to +125C (Extended)
Lead Free Status Lead Free —
Tindminan RoHS RoHS Compliant —
Process Technology 45nm 45 nm
Revision R2.1 —
Product Family — QorIQ P2
Number of Cores — 1
Maximum Core Frequency — 1.2 GHz (1000/800 MHz core grades)
Core Voltage — 1.05 V
Instruction Set — Power Architecture Book E, FPU, MMU
L1 Cache (per core) — 32 KB I-cache + 32 KB D-cache
Serial RapidIO (SRIO) — 2 ports
Security Engine (SEC) — Yes - IPSec/SSL/TLS/SRTP acceleration
Katayuan ng Lifecycle — Last Time Buy (per NXP discontinuance notice)

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