P3041NSE1PNB vs P3041NSE1MMB Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng P3041NSE1PNB sa pamamagitan ng NXP Semiconductors at P3041NSE1MMB sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

NXP Semiconductors
P3041NSE1PNB P3041NSE1PNB - 1.5GHz Quad-Core QorIQ P3 MPU | NXP | Networking

P3041NSE1PNB - 1.5GHz Quad-Core QorIQ P3 MPU | NXP | Networking

P3041NSE1PNB ✓ Nakahanda
NXP Semiconductors
P3041NSE1MMB P3041NSE1MMB - QorIQ P3041 Quad-Core 1.2GHz MPU | NXP

P3041NSE1MMB - QorIQ P3041 Quad-Core 1.2GHz MPU | NXP

P3041NSE1MMB ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro P3041NSE1PNB P3041NSE1MMB
Brand NXP Semiconductors NXP Semiconductors
Kategorya Microcontrollers Microcontrollers
Katayuan ng Lifecycle Aktibo Aktibo
Manufacturer NXP USA Inc. NXP Semiconductors
Product Family QorIQ P3 (P3041) —
Core Architecture PowerPC e500mc PowerPC e500mc
Number of Cores 4 4
Data Width 32-bit —
Maximum Core Frequency 1.5 GHz 1.2 GHz
Speed Grade / Suffix 1500 (NSE = standard temp, SEC engine, 1500 MHz) —
L1 Cache (per core) 32 KB I-cache + 32 KB D-cache —
L2 Cache (per core) 128 KB backside —
Platform Cache (shared) 1 MB CoreNet —
Packhaging 1295-ball FCPBGA (37.5 x 37.5 mm) —
Memory Controller DDR3 / DDR3L with ECC (up to 32-bit wide) DDR3/DDR3L with ECC [DATA_NEEDED: maximum supported frequency]
Ethernet 2 x 10 Gbit/s + 5 x 1 Gbit/s ETSEC —
PCIe 4 x PCIe Gen 2 controllers —
Security Engine SEC 5.0 (IPSec, SSL/TLS, 3GPP) —
Other Peripherals 2 x SATA 2.0, 2 x USB 2.0, I2C, SPI, UART, GPIO —
Temperature na Operasyon 0C to +105C Tj (standard temp) —
Tindminan RoHS Compliant Compliant (lead-free PBGA)
Series — QorIQ P3
Width ng Data Bus — 32-bit
Hanay ng Temperature na Operasyon — 0 C to 105 C
Package Type — 1295-FCPBGA (37.5 mm x 37.5 mm)
Uri ng Pagpapasok — Surface Mount
Encryption — Yes (encrypted secure boot, r1.1)
On-chip Crypto Acceleration — Yes (IPsec, SSL, SRTP) [DATA_NEEDED: throughput]
SerDes Lanes — [DATA_NEEDED: lane count and supported protocols]
Ethernet Interfaces — [DATA_NEEDED: number of SGMII/XAUI ports]
PCIe Support — Yes [DATA_NEEDED: number of lanes and generation]
USB Support — [DATA_NEEDED: USB version and host/device role]
Process Node — [DATA_NEEDED: lithography node]
Typical Power Consumption — [DATA_NEEDED: TDP in W]

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