PI7C9X111SLBFDEX vs PI7C9X111SLBFDE Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng PI7C9X111SLBFDEX sa pamamagitan ng Diodes Incorporated at PI7C9X111SLBFDE sa pamamagitan ng Diodes Incorporated. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Diodes Incorporated
PI7C9X111SLBFDEX - PCIe to PCI Reversible Bridge | Diodes Inc
PI7C9X111SLBFDEX ✓ NakahandaDiodes Incorporated
PI7C9X111SLBFDE - PCIe to PCI Reversible Bridge | Diodes Incorporated
PI7C9X111SLBFDE ✓ NakahandaPagsanggunian na paghahambing
| Parametro | PI7C9X111SLBFDEX | PI7C9X111SLBFDE |
|---|---|---|
| Brand | Diodes Incorporated | Diodes Incorporated |
| Kategorya | Interface ICs | Interface ICs |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Product Type | PCI Express to PCI Reversible Bridge | — |
| Bridge Direction | Forward (PCIe-to-PCI) and Reverse (PCI-to-PCIe) | — |
| PCIe Interface | x1 (single lane) | — |
| PCI Bus Width | 32-bit | 32-bit |
| PCI Bus Speed | Up to 66 MHz | 66 MHz (also supports 33 MHz) |
| Packhaging | 128-LQFP (14x14 mm) | 128-LQFP (14x14 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Volte ng Pagbibigay | [DATA_NEEDED: VDD nominal] | 1.8 V and 3.3 V (typical dual-rail) |
| Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade] | -40C to +85C (industrial) |
| Pin Strapping | TM1 low enables Clock Power Management via REQ_L[3:2] and REVRSB at PERST# | TM1, REQ_L[3:2], REVRSB |
| Packaging Option | Tape & Reel (EX suffix) | — |
| Tindminan RoHS | Compliant (per Diodes product page) | Compliant |
| Bus Architecture | SlimLine PCIe bridge family | — |
| Pericom Part Family | PI7C9X111SL (Diodes / Pericom legacy line) | — |
| Datasheet Document | PI7C9X111SL datasheet from diodes.com | — |
| Fungsi | — | PCI Express to PCI Reversible Bridge |
| PCIe Lanes | — | x1 |
| PCIe Generation | — | PCIe 1.1 (2.5 GT/s) |
| Bridging Mode | — | Forward and Reverse (configurable) |
| Reference Clock | — | 100 MHz differential (REFCLK+/-, PCIe-compliant) |
| Power Management | — | Clock Power Management, ASPM, hot-plug |
| Level ng MSL | — | 3 |