R5F10RJAAFA#V0 vs R5F104BCANA Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng R5F10RJAAFA#V0 sa pamamagitan ng Renesas Electronics at R5F104BCANA sa pamamagitan ng Renesas Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Renesas Electronics
R5F10RJAAFA#V0 R5F10RJAAFA#V0 - 16KB Flash 16-bit LCD MCU | Renesas

R5F10RJAAFA#V0 - 16KB Flash 16-bit LCD MCU | Renesas

R5F10RJAAFA#V0 ✓ Nakahanda
Renesas Electronics
R5F104BCANA R5F104BCANA - RL78/G14 16-Bit MCU, 32KB Flash, 32MHz | Renesas

R5F104BCANA - RL78/G14 16-Bit MCU, 32KB Flash, 32MHz | Renesas

R5F104BCANA ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro R5F10RJAAFA#V0 R5F104BCANA
Brand Renesas Electronics Renesas Electronics
Kategorya Microcontrollers Microcontrollers
Katayuan ng Lifecycle Aktibo Aktibo
Series RL78/L12 —
Core RL78 16-bit CISC —
Program Memory Size 16 KB (16K x 8) Flash —
RAM Size 1.5 KB (Data Flash 2 KB) —
Maximum CPU Frequency 24 MHz —
Performance 31 DMIPS at 24 MHz —
Supply Voltage Range 1.6 V to 5.5 V —
Temperature na Operasyon -40 C to +85 C -40 C to +85 C
Packhaging 52-LQFP (10x10 mm) 32-HWQFN (5x5 mm) with exposed pad
Uri ng Pagpapasok Surface Mount Surface Mount
Number of I/O Pins [DATA_NEEDED: number of I/O pins] —
Active Current 75 µA/MHz (typ) —
Standby Current (RTC + LVD) 0.64 µA (typ) —
LCD Controller/Driver Integrated segment LCD controller/driver —
LCD Driving Methods External resistance division, capacitive split, internal voltage boost —
ADC [DATA_NEEDED: ADC resolution/channels] —
Communication Peripherals UART, I2C, CSI (per family) —
Tindminan RoHS Compliant Compliant
Lead Free Yes —
Product Family — RL78/G14
Core Architecture — RL78 16-bit CISC
Maximum CPU Clock — 32 MHz
Program Memory (Flash) — 32 KB (32K x 8)
SRAM — 4 KB
Data Flash — 4 KB
Bilang ng Pin — 32
Operating Voltage — 1.6 V to 5.5 V
A/D Converter — 12-bit, multiple channels
Timers — 16-bit timer array
Communication Interfaces — UART, I2C, CSI/SPI
Watchdog Timer — Yes (on-chip)
On-chip Debug — Yes (single-wire)
Level ng MSL — 3 (per JEDEC J-STD-020, typical for HWQFN)

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