RTAX2000SL-1LG624V vs RTAX2000S-1CG624PROTO Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX2000SL-1LG624V sa pamamagitan ng Microchip Technology at RTAX2000S-1CG624PROTO sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX2000SL-1LG624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-1LG624V ✓ NakahandaMicrochip Technology
RTAX2000S-1CG624PROTO - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CG624PROTO ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX2000SL-1LG624V | RTAX2000S-1CG624PROTO |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Logic Cells | 32256 | 32256 |
| CLBs (Configurable Logic Blocks) | 21504 | — |
| Equivalent Gates | 2000000 (approx.) | — |
| Family | RTAX-S/SL (radiation-tolerant FPGA) | RTAX-S/SL Radiation-Tolerant FPGA |
| Process Variant | SL (super low-power) CMOS | — |
| Core Supply Voltage | 1.5 V (nominal) | — |
| Temperature na Operasyon | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Packhaging | 624-terminal ceramic CGA (CG624) | CCGA-624 (CG624 ceramic column grid array) |
| Uri ng Pagpapasok | Surface Mount (column grid array) | Surface Mount |
| Programming Technology | Anti-fuse, one-time programmable | — |
| Configuration | Live at power-up, single-chip (no external config storage) | Live at power-up (nonvolatile antifuse) |
| Radiation Tolerance | Radiation-tolerant for space flight systems | — |
| Speed Grade | -1 | -1 |
| Application Class | Space flight / aerospace | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Embedded Memory | [DATA_NEEDED: embedded SRAM bits] | 540 kbits (family max, with optional EDAC) |
| Equivalent System Gates | — | 2000000 |
| Configurable Logic Blocks (CLBs) | — | 21504 |
| User I/Os (family max) | — | 684 |
| Total Ionizing Dose (functional) | — | 300 krad (Si) |
| Total Ionizing Dose (parametric) | — | 200 krad (Si) |
| SEU Rate | — | Less than 1E-10 errors per bit-day |
| Maximum System Frequency | — | 350 MHz (family performance) |
| Technology | — | CMOS antifuse (one-time programmable) |
| Qualification Flow | — | PROTO (engineering prototype) |