RTAX2000SL-CGS624E vs RTAX2000SL-CGS624V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX2000SL-CGS624E sa pamamagitan ng Microchip Technology at RTAX2000SL-CGS624V sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX2000SL-CGS624E - 2M-Gate Rad-Tolerant FPGA CGA-624 | Microchip
RTAX2000SL-CGS624E ✓ NakahandaMicrochip Technology
RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-CGS624V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX2000SL-CGS624E | RTAX2000SL-CGS624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Logic Elements / CLBs | 21504 CLBs | — |
| Equivalent System Gates | 2000000 gates | 2000000 |
| Additional ASIC Gates | 250000 gates | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | RTAX-S/SL Radiation-Tolerant FPGA |
| Technology | CMOS, anti-fuse OTP | CMOS antifuse (nonvolatile) |
| Radiation Tolerance | Radiation-tolerant (space-flight grade) | — |
| Packhaging | CBGA624 / CGA-624 ceramic column grid array | CG624 ceramic package |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration | Live at power-up, one-time programmable | One-time programmable antifuse, live at power-up |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | 540 kbits with optional EDAC protection |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Volte ng Pagbibigay | [DATA_NEEDED: core supply voltage] | — |
| Maximum I/O | [DATA_NEEDED: maximum user I/O count for CG624 package] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Qualification | [DATA_NEEDED: QML qualification level] | — |
| Logic Cells (CLBs) | — | 21504 |
| User I/Os (maximum) | — | 684 |
| Total Ionizing Dose (TID) | — | 300 krad (Si) functional / 200 krad (Si) parametric |
| Single-Event Upset Rate | — | Less than 1E-10 errors per bit-day |
| Embedded SRAM Features | — | Built-in FIFO control logic |
| Clock Architecture | — | Segmentable clock structures |
| Routing | — | Chip-wide highway routing, carry logic |
| Application Domain | — | Space-flight systems |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage] |
| Speed Grade | — | [DATA_NEEDED: speed grade] |
| System Frequency (typical) | — | [DATA_NEEDED: system frequency] |