RTAX2000SL-CGS624E vs RTAX250S-CG624E Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX2000SL-CGS624E sa pamamagitan ng Microchip Technology at RTAX250S-CG624E sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX2000SL-CGS624E - 2M-Gate Rad-Tolerant FPGA CGA-624 | Microchip
RTAX2000SL-CGS624E ✓ NakahandaMicrochip Technology
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624E ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX2000SL-CGS624E | RTAX250S-CG624E |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Logic Elements / CLBs | 21504 CLBs | — |
| Equivalent System Gates | 2000000 gates | — |
| Additional ASIC Gates | 250000 gates | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | RTAX-S radiation-tolerant FPGA |
| Technology | CMOS, anti-fuse OTP | — |
| Radiation Tolerance | Radiation-tolerant (space-flight grade) | — |
| Packhaging | CBGA624 / CGA-624 ceramic column grid array | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration | Live at power-up, one-time programmable | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Volte ng Pagbibigay | [DATA_NEEDED: core supply voltage] | — |
| Maximum I/O | [DATA_NEEDED: maximum user I/O count for CG624 package] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Qualification | [DATA_NEEDED: QML qualification level] | — |
| System Gates | — | 250000 gates |
| Logic Cells (CLBs) | — | 2816 |
| Maximum Toggle Frequency | — | 649 MHz |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V |
| Logic Family | — | CMOS |
| CLB Combinatorial Delay (max) | — | 0.930 ns |
| Package Type | — | CCGA-624 (ceramic column grid array, 624 pins) |
| Programming Technology | — | Antifuse (one-time programmable) |
| SEU Hardening | — | SEU-hardened registers, no external TMR required |
| SEU Immunity | — | Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day |
| Power-Up Behavior | — | Live at power-up (true single-chip) |
| Target Application | — | Space-flight systems |