RTAX4000SL-CQ352V vs RTAX4000SL-1CQ352V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX4000SL-CQ352V sa pamamagitan ng Microchip Technology at RTAX4000SL-1CQ352V sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX4000SL-CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-CQ352V ✓ NakahandaMicrochip Technology
RTAX4000SL-1CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-1CQ352V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX4000SL-CQ352V | RTAX4000SL-1CQ352V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Type | Radiation-Tolerant FPGA | — |
| Family | RTAX-S/SL | RTAX-S/SL Radiation-Tolerant FPGAs |
| Equivalent System Gates | 4,000,000 | 4000000 |
| Configurable Logic Blocks (CLBs) | 40,320 | — |
| Logic Cells | 60,480 | 60480 |
| Process Technology | CMOS | — |
| Configuration Type | Live at power-up (single-chip) | — |
| Embedded Memory | Embedded SRAM with FIFO control logic | — |
| Clock Resources | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Dedicated carry logic | — |
| Packhaging | CQ352 (352-pin ceramic column grid array) | CQ352 (ceramic, 352-pin) |
| Uri ng Pagpapasok | Surface Mount | — |
| Radiation Environment | Space flight | — |
| Temperature na Operasyon | [DATA_NEEDED: Operating Temperature] | [DATA_NEEDED: operating temperature range] |
| Volte ng Pagbibigay | [DATA_NEEDED: Supply Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O count for CQ352 package] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS Status] | — |
| Logic Elements (CLBs) | — | 40320 |
| Technology | — | CMOS, antifuse (one-time programmable) |
| Speed Grade | — | -1 |
| Quality / Screening Grade | — | V (space qualification level) |
| Embedded SRAM | — | Yes, with built-in FIFO control logic |
| Power-Up Behavior | — | Live at power-up (LAPU) |
| Configuration | — | Single-chip, no external boot PROM |
| Target Market | — | Space-flight systems |
| Base Architecture | — | Axcelerator (commercial counterpart) |
| Core Voltage | — | [DATA_NEEDED: core supply voltage] |
| I/O Voltage | — | [DATA_NEEDED: I/O supply voltage] |
| TID Rating | — | [DATA_NEEDED: total ionizing dose rating] |
| Radiation Immunity | — | Configuration immune to single-event upset (antifuse) |
| Level ng MSL | — | [DATA_NEEDED: moisture sensitivity level] |