SI5340A-D-GM vs SI5341A-D-GM Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng SI5340A-D-GM sa pamamagitan ng Skyworks Solutions at SI5341A-D-GM sa pamamagitan ng Skyworks Solutions. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Skyworks Solutions
SI5340A-D-GM - 1028 MHz Ultra-Low Jitter 4-Output Clock Gen | Skyworks
SI5340A-D-GM ✓ NakahandaSkyworks Solutions
SI5341A-D-GM - 10-Output Any-Frequency Clock Generator | Skyworks
SI5341A-D-GM ✓ NakahandaPagsanggunian na paghahambing
| Parametro | SI5340A-D-GM | SI5341A-D-GM |
|---|---|---|
| Brand | Skyworks Solutions | Skyworks Solutions |
| Kategorya | Clock & Timing | Clock & Timing |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Fungsi | Clock generator, any-frequency, any-output | 10-output any-frequency any-output clock generator |
| Bilang ng Outputs | 4 | 10 differential (configurable per-output format) |
| Number of References | 4 | — |
| Maximum Output Frequency | 1028 MHz | 1028 MHz |
| Output Logic | LVPECL, LVDS, HCSL, CMOS, CML (per output) | — |
| Volte ng Pagbibigay | 1.71 V to 3.47 V (core); 1.8 V / 2.5 V / 3.3 V typical | 1.71 V to 3.47 V |
| Phase Jitter (12 kHz to 20 MHz) | 0.09 ps RMS (typical) | 0.09 ps RMS typical |
| Frequency Synthesis Modes | Integer and fractional (MultiSynth) | — |
| Control Interface | I2C / SPI | — |
| Output Enable / Disable | Per-output | — |
| Packhaging | 44-pin QFN (7x7 mm) with exposed pad | 64-VFQFN Exposed Pad (QFN-64) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40 C to +85 C (industrial) | -40 C to +85 C |
| Level ng MSL | 3 | — |
| Tindminan RoHS | Compliant | Compliant |
| Family | Si5340 / Si5341 | — |
| Order Code Suffix | -D (4-output default frequency plan) | — |
| Manufacturer | Skyworks Solutions Inc. (formerly Silicon Labs) | — |
| Minimum Output Frequency | — | 0.0001 MHz (0.1 Hz) |
| Reference Inputs | — | 4 (LVCMOS, LVDS, LVPECL, HCSL) |
| Output Formats | — | LVDS, LVPECL, HCSL, LVCMOS, CMOS (per-pin) |
| Synthesis Technology | — | MultiSynth fractional divider + integer PLL |
| Frequency Resolution | — | 1 ppb |
| Configuration Interface | — | I2C, SPI, on-chip NVM |