EP1M350F780C8 vs EP1M350F780I5 Karşılaştırma
Ayrıntılı yan yana karşılaştırma EP1M350F780C8 tarafından Altera ve EP1M350F780I5 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Altera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 NrndÖzellik Karşılaştırması
| Parametre | EP1M350F780C8 | EP1M350F780I5 |
|---|---|---|
| Marka | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Obsolete | NRND |
| Device Family | Altera APEX Mercury (EP1M) | Altera Mercury (EP1M) Enhanced Configuration Device |
| Typical Gates | 350,000 | — |
| Maximum Logic Elements (LEs) | 12,160 | — |
| Embedded RAM Blocks | 4 dual-port RAM blocks | — |
| Paket | 780-ball FineLine BGA | 780-ball FineLine BGA (F780) |
| Speed Grade | C8 (commercial, speed bin 8) | 5 |
| İşletim Sıcaklığı | 0C to +85C (commercial) | — |
| Supply Voltage (Core) | [DATA_NEEDED: core Vcc] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) | — |
| Global Clock Networks | 8 | — |
| Configuration Interface | IEEE 1532 / passive serial / JTAG | — |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| RoHS Durumu | unknown (legacy device) | [DATA_NEEDED: RoHS status] |
| Montaj Türü | Surface Mount (BGA) | — |
| MSL Seviyesi | [DATA_NEEDED: MSL rating] | — |
| Fonksiyon | — | FPGA configuration PROM with integrated controller |
| Storage Density Code | — | 350 (high-density) |
| Supported Configuration Schemes | — | Passive Serial, Active Serial, Fast Passive Parallel |
| Internal Architecture | — | Configuration controller + flash memory array |
| Programming Method | — | In-system programmable via Altera Quartus / JTAG |
| Temperature Grade (suffix "I") | — | Industrial |
| Target FPGA Compatibility | — | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| Cascade / Multi-FPGA Support | — | Yes, supports daisy-chained multi-FPGA boot |
| Read-Back | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |