EP2SGX90EF1508C3N vs EP2S90F1508C3N Karşılaştırma
Ayrıntılı yan yana karşılaştırma EP2SGX90EF1508C3N tarafından Altera ve EP2S90F1508C3N tarafından IntelAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Altera
EP2SGX90EF1508C3N - Stratix II GX FPGA 90K LEs 1.2V FC-FBGA1508 | Intel
EP2SGX90EF1508C3N ⚠ Son Satın Alma
Özellik Karşılaştırması
| Parametre | EP2SGX90EF1508C3N | EP2S90F1508C3N |
|---|---|---|
| Marka | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Son Alış Zamanı | NRND |
| Family | Stratix II GX | — |
| Logic Elements (LEs) | 90960 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Logic Array Blocks (LABs) | 4548 | — |
| Embedded Memory (bits) | 4520448 | — |
| DSP Blocks / 18x18 Multipliers | 192 | — |
| Maximum User I/Os | 650 | — |
| Transceiver Channels | 12 | — |
| Transceiver Data Rate | up to 6.375 Gbps | — |
| PLLs / DLLs | 8 PLLs / 16 DLLs | — |
| Maximum Internal Clock Frequency | 816.9 MHz | — |
| Process Technology | 90 nm CMOS | — |
| Core Supply Voltage | 1.2 V | — |
| Speed Grade | C3 (Enhanced, commercial) | -3 |
| Paket | 1508-ball FC-FBGA | — |
| Montaj Türü | Surface Mount | Surface Mount |
| İşletim Sıcaklığı | 0C to +85C (commercial) | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| Bitstream Encryption | AES-128 supported | — |
| RoHS Durumu | Compliant (lead-free) | — |
| Series | — | Stratix II |
| Manufacturer | — | Altera (now Intel) |
| Logic Elements | — | 90,960 |
| Embedded Memory Bits | — | 4,520,488 |
| LABs / ALMs | — | 4,548 |
| User I/Os | — | 902 |
| Number of Terminals | — | 1508 |
| Package Type | — | 1508-BBGA, FCBGA (Flip-Chip BGA) |
| Process Node | — | 90 nm |
| Operating Temperature Grade | — | Commercial |
| Core Voltage (VCCINT) | — | 1.2 V (typical) |
| Lead-Free / RoHS | — | RoHS compliant per Intel product page |
| Nem Hassasiyet Seviyesi (MSL) | — | 3 (per JEDEC J-STD-020, reflow at 260 C) |
| Configuration | — | FPGA, SRAM-based |