EPM3064ATC100-4 vs EPM3064ATC100-7 Karşılaştırma

Ayrıntılı yan yana karşılaştırma EPM3064ATC100-4 tarafından Altera ve EPM3064ATC100-7 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.

Özellik Karşılaştırması

Parametre EPM3064ATC100-4 EPM3064ATC100-7
Marka Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Yaşam Döngüsü Durumu NRND Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (EEPROM-based) —
Macro Cells 64 —
Logic Array Blocks (LABs) 2 2
Usable Gates 1,250 (range 600 to 10,000 across family) 1,250
Maximum User I/O Pins 34 —
Pin-to-Pin Delay (tPD) 4.5 ns —
Counter Frequency (fCNT) 227.3 MHz —
Internal Performance 222.2 MHz —
Supply Voltage VCCINT 3.3 V —
I/O Voltage (MultiVolt) 2.5 V / 3.3 V / 5.0 V —
In-System Programming Yes (IEEE 1149.1 JTAG) —
Process Technology CMOS EEPROM —
Paket 100-pin TQFP 100-pin TQFP
Montaj Türü Surface Mount Surface Mount
İşletim Sıcaklığı 0C to +70C (commercial) [DATA_NEEDED: industrial temp grade option] 0C to +70C (commercial)
RoHS Durumu unknown —
Architecture 5-level Altera MAX —
Macrocells — 64
Maximum User I/Os — 66 (in 100-pin TQFP)
Pin-to-Pin Propagation Delay (tPD) — 7.5 ns (-7 speed grade)
Maximum Internal Counter Frequency — 135.1 MHz
Supply Voltage - VCCINT (Core) — 3.3 V
Supply Voltage - VCCIO (I/O) — 2.5 V or 3.3 V (5.0 V tolerant inputs)
Technology — CMOS EEPROM
In-System Programming (ISP) — Yes, via IEEE 1149.1 JTAG
PCI Compliance — PCI Local Bus Specification Revision 2.2
JTAG Boundary Scan — Yes
Lead Free / RoHS — Compliant (modern shipments)

Dökümanlar & Kaynaklar

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