EPM3512AQC208-10S vs EPM3512AQ208-10N Karşılaştırma
Ayrıntılı yan yana karşılaştırma EPM3512AQC208-10S tarafından Altera ve EPM3512AQ208-10N tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Özellik Karşılaştırması
| Parametre | EPM3512AQC208-10S | EPM3512AQ208-10N |
|---|---|---|
| Marka | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Obsolete | Aktif |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | 512 |
| Usable Gates | 1750 | 10,000 |
| Logic Array Blocks (LABs) | 32 (16 macrocells each) | 32 |
| Paket | 208-pin FineLine BGA-256 | 208-pin PQFP |
| User I/Os | 208 | 172 |
| Speed Grade | -10 (tPD1 = 7.5 ns) | -10 (10 ns pin-to-pin delay) |
| Propagation Delay (tPD1) | 7.5 ns (pin-to-pin) | — |
| Supply Voltage - VCCINT (internal) | 3.3 V | — |
| Supply Voltage - VCCIO (I/O) | 2.5 V, 3.3 V, or 5.0 V (MultiVolt) | — |
| Programming Technology | CMOS EEPROM | — |
| In-System Programmability (ISP) | Yes (IEEE Std. 1149.1 JTAG) | — |
| PCI Compliance | Yes (PCI Local Bus Specification Rev 2.2) | — |
| İşletim Sıcaklığı | 0C to +70C (commercial) | — |
| Boundary-Scan (JTAG) | Yes (1149.1 compliant) | — |
| Program/Erase Endurance | 100 cycles minimum | — |
| Logic Family | CMOS | — |
| Process Technology | EEPROM-based CMOS | CMOS EEPROM |
| RoHS Durumu | [DATA_NEEDED: rohs_status] | unknown |
| Pin-to-Pin Delay (tPD) | — | 4.5 ns (typical) |
| Maximum Frequency (fCNT) | — | 227.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V, 3.3 V, or 5.0 V |
| Programming Interface | — | IEEE Std. 1532 (JTAG) ISP |
| Operating Temperature (Industrial) | — | -40 C to +85 C |
| Montaj Türü | — | Surface Mount |