RTAX1000SL-CQ352V vs RTAX1000SL-1CQ352V موازنہ
تفصیلی ساتھ ساتھ موازنہ از RTAX1000SL-CQ352V بذریعہ Microchip Technology اور RTAX1000SL-1CQ352V بذریعہ Microchip Technology. اہم خصوصیات، برقی پیرامیٹرز، پیکیجنگ، لائف سائیکل اسٹیٹس، قیمتوں اور دستیابی کا موازنہ کریں تاکہ آپ کی ڈیزائن ضروریات کے لیے بہترین کمپوننٹ کا تعین ہو سکے۔
Microchip Technology
RTAX1000SL-CQ352V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CQ352V ✓ فعالMicrochip Technology
RTAX1000SL-1CQ352V - 1M-Gate Rad-Tolerant Antifuse FPGA | Microchip
RTAX1000SL-1CQ352V ✓ فعالخصوصیات کا موازنہ
| پیرامیٹر | RTAX1000SL-CQ352V | RTAX1000SL-1CQ352V |
|---|---|---|
| برانڈ | Microchip Technology | Microchip Technology |
| زمرہ | FPGA & CPLD | FPGA & CPLD |
| لائف سائیکل کی حالت | فعال | فعال |
| Family | RTAX-SL (RTAX-S/SL Radiation-Tolerant FPGAs) | RTAX-S/SL Radiation-Tolerant FPGA |
| Equivalent System Gates | 1,000,000 | 1,000,000 |
| CLBs (Logic Modules) | 12,096 | — |
| Logic Cells | 18,144 | 18,144 |
| Maximum Toggle Frequency | 581 MHz | — |
| Process Technology | 0.15 um CMOS | CMOS |
| Core Voltage | 1.5 V | — |
| Programming Technology | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant, space-flight qualified family | — |
| Power-Up Behavior | Live at power-up (non-volatile) | — |
| Configuration Upset Immunity | No SEU in configuration memory (antifuse) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| پیکیج | 352-pin Ceramic CQFP (CQ352V) | CQ352 ceramic quad flat pack (352 pins) |
| ماؤنٹنگ ٹائپ | Surface Mount | Surface Mount |
| آپریٹنگ درجہ حرارت | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| I/O Voltage | [DATA_NEEDED: I/O bank voltage range] | — |
| Total Ionizing Dose (TID) | [DATA_NEEDED: TID rating in krad (Si)] | [DATA_NEEDED: TID rating] |
| MSL لیول | [DATA_NEEDED: moisture sensitivity level] | — |
| RoHS اسٹیٹس | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Estimated Equivalent Gates per CLB | [DATA_NEEDED: gates-per-CLB ratio] | — |
| Configurable Logic Blocks (CLBs) | — | 12,096 |
| Programmable Interconnect | — | Antifuse (one-time programmable) |
| Speed Grade | — | -1 |
| Screening / Ordering Suffix | — | V (flight-grade per Microchip ordering code) |
| Clock Resources | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| Configuration | — | Live at power-up, no external boot memory |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |