RTAX4000SL-CQ352EV vs RTAX4000D-CQ352E موازنہ
تفصیلی ساتھ ساتھ موازنہ از RTAX4000SL-CQ352EV بذریعہ Microchip Technology اور RTAX4000D-CQ352E بذریعہ Microsemi. اہم خصوصیات، برقی پیرامیٹرز، پیکیجنگ، لائف سائیکل اسٹیٹس، قیمتوں اور دستیابی کا موازنہ کریں تاکہ آپ کی ڈیزائن ضروریات کے لیے بہترین کمپوننٹ کا تعین ہو سکے۔
Microchip Technology
RTAX4000SL-CQ352EV - 4M Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-CQ352EV ✓ فعالخصوصیات کا موازنہ
| پیرامیٹر | RTAX4000SL-CQ352EV | RTAX4000D-CQ352E |
|---|---|---|
| برانڈ | Microchip Technology | Microsemi |
| زمرہ | FPGA & CPLD | FPGA & CPLD |
| لائف سائیکل کی حالت | فعال | فعال |
| Family | RTAX-SL (Radiation-Tolerant FPGA) | RTAX-DSP Radiation-Tolerant FPGA |
| System Gates | 4,000,000 | 4,000,000 |
| Logic Cells (ASIC Gates) | 40,320 | — |
| Process Technology | 0.15 um CMOS antifuse | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| پیکیج | 352-pin CQFP (Ceramic Quad Flat Pack) | 352-Pin CQFP (CQ352) ceramic, hermetic |
| Screening Level | EV (enhanced spaceflight screening) | — |
| Programming Technology | Antifuse (one-time programmable, live at power-up) | — |
| Radiation Tolerance | Radiation-tolerant (TID/SEL/SEU per family datasheet) | Radiation-tolerant, space-flight qualified family (per Microchip RTAX-DSP product page) |
| Configuration | Single-chip, no external boot memory | Live at power-up (antifuse, single-chip) |
| I/O Supply Voltage | [DATA_NEEDED: I/O bank voltage] | — |
| Maximum System Frequency | [DATA_NEEDED: maximum system frequency] | — |
| آپریٹنگ درجہ حرارت | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Package Material | Hermetic ceramic (JESD-30 S-CQFP-F352) | — |
| ماؤنٹنگ ٹائپ | Surface Mount | Surface Mount |
| RoHS اسٹیٹس | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - hermetic ceramic aerospace package, typically exempt] |
| Typical Application | Space-flight systems, satellites, payload processing | — |
| Logic Cells | — | 33,600 |
| Embedded Memory | — | Embedded SRAM with built-in FIFO control logic |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Number of CLBs | — | [DATA_NEEDED: CLB / AX cell organization count] |
| User I/O Count | — | [DATA_NEEDED: user I/O count for CQ352 package] |
| Speed Grade | — | Standard (no dash-1 speed suffix indicated in CQ352E ordering code) |
| Design Software | — | Microsemi/Microchip Libero SoC |