ENC28J60T/SO - 10BASE-T Ethernet Controller with SPI | Microchip
MPN: ENC28J60T/SO ✓ فعالENC28J60T/SO جائزہ
An Ethernet controller (also called a network interface controller or NIC) is a semiconductor that sits between a host microcontroller and the physical copper network. It performs the hardware-intensive layer-1 and layer-2 work — line coding, Manchester encoding, preamble generation, CRC generation and checking, frame filtering — so the host only has to move payload bytes over a simple serial bus. The ENC28J60T/SO belongs to the controller IC family, which is itself a subset of interface ICs within the broader semiconductor category.
Key features include full IEEE 802.3 compliance for 10BASE-T half-duplex Ethernet, a full duplex-capable integrated MAC, a hardware-assisted checksum calculation engine for TCP, UDP, and IP headers, an internal DMA engine for high-throughput data movement, several programmable packet filtering schemes, and two dedicated LED outputs for link and network-activity indication. A non-blocking internal DMA engine means the host SPI bus is not stalled during frame processing.
Technically, the device is a 3.3 V CMOS part with a maximum supply current of 160 mA, and its SPI CS, SCK, and SI inputs plus the RESET input are 5 V tolerant, allowing direct hookup to legacy 5 V host logic in many designs. An 8 Kbyte transmit/receive dual-port buffer SRAM holds packets in either direction, while the SPI interface runs up to 20 MHz-class host clocking and uses a simple four-wire serial protocol (SCK, SI, SO, CS) plus an interrupt output and a reset input. External magnetics — an Ethernet isolation transformer with integrated center-tap bias — and an RJ45 jack are required because the PHY itself is analog and transformer-based.
Typical applications include low-cost embedded web servers, industrial sensor gateways, PLC and HMI retrofit modules, home-automation nodes, printers, and industrial data loggers that need TCP/IP connectivity without an external Ethernet bridge. The device is also a common choice in maker and education platforms because the SPI interface is simple and a complete TCP/IP stack is available in widely used open-source libraries.
Design considerations center on the analog side of the board: keep the RBIAS network, 25 MHz crystal, 1.0 uF and 1.0 uF bias capacitors, and the PHY-to-transformer trace short and isolated from switching nodes, and provide a solid ground plane directly under the analog supply pins. On the digital side, add a level translator if the host runs at 5 V and drives the device's interrupt or receives its SPI output, because those outputs are 3.3 V CMOS levels.
This page consolidates the manufacturer datasheet details, pin and package constraints, package-qualified drop-in alternatives, and practical layout and power notes for engineers who need a compact single-chip 10BASE-T network port rather than a modular SPI-to-Ethernet solution.
کے لیے ڈراپ اِن متبادل ENC28J60T/SO — یکساں پیکیج، پن سے پن مطابقت پذیر۔ مختلف پیکیج والے پرزے جن کے لیے PCB دوبارہ کام درکار ہو، شامل نہیں ہیں۔
اس سیریز میں مختلف ورژن
اسی سیریز کے ماڈلز جو ڈراپ اِن مطابقت رکھتے ہیں ENC28J60T/SO (یکساں فارم فیکٹر اور فٹ پرنٹ) — میں مختلف Host Interface, Ethernet Speed, Integrated PHY, Operating Temperature Range, Package.
ENC28J60T-I/SO
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →ENC28J60-I/SO
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →ENC28J60T/SO تفصیلات
| Controller Type | Ethernet Controller, MAC/10BASE-T |
| Host Interface | SPI (Serial Peripheral Interface) |
| Supply Voltage Range | 3.1 V to 3.6 V |
| سپلائی کرنٹ | 160 mA |
| Ethernet Speed | 10BASE-T half-duplex |
| Standard Compliance | IEEE 802.3 compatible |
| Packet Buffer RAM | 8 Kbyte transmit/receive dual-port buffer SRAM |
| Internal MAC | Yes, integrated MAC with hardware-assisted checksum calculation |
| Integrated PHY | Yes, integrated 10BASE-T PHY |
| Internal DMA | Yes, non-blocking internal DMA module |
| Packet Filtering | Programmable packet filtering schemes |
| Indicator Outputs | 2 LEDs for link and network activity indication |
| پیکیج / کیس | 28-SOIC (0.295 in, 7.50 mm width) |
| ماؤنٹنگ ٹائپ | Surface Mount |
| آپریٹنگ درجہ حرارت رینج | -40 °C to +125 °C (T grade) |
| SPI Input Logic Tolerance | CS, SCK, SI and RESET inputs are 5 V tolerant |
| External Components Required | Ethernet isolation transformer with center-tap bias, RJ45 jack, 25 MHz crystal, RBIAS network |
ENC28J60T/SO 28-soic (0.295 in, 7.50 mm width) پن کنفیگریشن گائیڈ
ENC28J60T/SO (28-soic (0.295 in, 7.50 mm width) پیکیج) کے لیے پن کنفیگریشن۔ پن نمبرنگ، فنکشنز اور کنکشن ڈایاگرامز مینوفیکچرر کے ڈیٹا شیٹ میں بیان کیے گئے ہیں۔ درست فٹ پرنٹ اور سولڈرنگ رہنما ہدایات کے لیے اسی سے رجوع کریں۔
کے لیے تفصیلی پن آؤٹ ڈیٹا دستیاب نہیں ENC28J60T/SO.
رجوع کریں ڈیٹا شیٹ مکمل پن کنفیگریشن کے لیے۔
عام استعمالات
ENC28J60T/SO کے لیے موزوں ہے 6 ایپلیکیشنs: Embedded Web Server and Device Configuration Port, Industrial Sensor Gateway and Telemetry Node, Home Automation and Smart Building Controller, Data Logger and Instrumentation Front-End, Printer, POS Terminal and Retail Peripherals, IoT Retrofit and Educational Networking Platform.
Embedded Web Server and Device Configuration Port
The ENC28J60T/SO gives a microcontroller-based product a wired management port with no added silicon beyond one 28-SOIC IC. Its 8 Kbyte transmit/receive dual-port buffer and internal DMA module let the host serve HTTP pages, firmware update files, and configuration forms while the SPI bus remains available for sensors and actuators. Because the device is 10BASE-T half-duplex, transfers are sized to a few hundred kilobytes rather than bulk media, which suits setup and diagnostic traffic. The design still needs an isolation transformer with center-tap bias, a matching RJ45 jack, and the manufacturer-recommended 25 MHz crystal and RBIAS network, all of which are low-cost passives. Firmware engineers typically drive the part with a mature open-source TCP/IP stack, and the 160 mA maximum supply current at 3.3 V is small enough for a standard regulator with local decoupling.
تجویز کردہ
Industrial Sensor Gateway and Telemetry Node
For a wired industrial sensor node, the ENC28J60T/SO offers a low-cost path to a Modbus/TCP or HTTP telemetry link over existing plant cabling. Its -40 °C to +125 °C temperature grading covers thermally harsh cabinets, and the internal DMA engine plus hardware-assisted checksum calculation offload work that would otherwise slow a small MCU. The 10BASE-T half-duplex rate matches the throughput of most environmental, pressure, and energy monitoring points, where payloads are sent every few seconds. Designers should still budget for Ethernet surge protection and an isolated magnetics section, and should keep the analog PHY traces short and separated from switching regulators. The SPI CS, SCK, SI and RESET inputs are 5 V tolerant, which helps when bridging to an older industrial controller, while the 3.3 V CMOS outputs still require level translation back toward a 5 V host.
تجویز کردہ
Home Automation and Smart Building Controller
The ENC28J60T/SO is a natural fit for a wall-panel or DIN-rail home automation controller that needs to join a wired IP backbone alongside Wi-Fi or radio links. A single SPI device provides a full 10BASE-T node with link and activity LEDs already driven by dedicated outputs, so the enclosure needs no additional status hardware. Because the controller supports programmable packet filtering, a controller can discard unicast traffic for addresses it does not own, reducing needless SPI wake-ups and MCU workload. The 28-SOIC footprint keeps the design compact, and the 3.1 V to 3.6 V operating range matches typical 3.3 V regulator outputs used alongside radio modules. Note that 10BASE-T half-duplex is adequate for control and status traffic but not for video streaming, so pair it with a faster PHY only where bulk data is expected.
تجویز کردہ
Data Logger and Instrumentation Front-End
A bench or field data logger needs to move recorded data off a device reliably, and the ENC28J60T/SO provides that path over standard Cat5 cabling without adding a module-level BOM. The 8 Kbyte dual-port buffer allows continuous capture into a host MCU while frames are transmitted, and the DMA engine handles the low-level SPI traffic so the logging loop is not starved. File upload protocols are usually latency-tolerant, so the 10BASE-T half-duplex link is rarely the bottleneck; a single store-and-forward transfer of a few megabytes simply takes proportionally longer. Keep the PHY section on a quiet part of the board, away from switching regulators and relay drivers that share the enclosure, and use the manufacturer-specified RBIAS network with tight tolerance so the line-level bias current stays within specification across temperature.
تجویز کردہ
Printer, POS Terminal and Retail Peripherals
Point-of-sale terminals and receipt printers often need a wired network option to complement USB or serial, and the ENC28J60T/SO provides it in a single low-cost IC. Transaction traffic — receipts, order updates, and remote management commands — is small and bursty, which suits 10BASE-T half-duplex operation and the device's 8 Kbyte buffer. The controller also computes IP, TCP, and UDP checksums in hardware, which shortens host firmware and frees the MCU for display and printer timing tasks. Since the interface is SPI, one MCU can share the bus between the Ethernet controller, a flash memory for spooling, and a display controller. The two LED outputs let a bezel show link and traffic state without extra GPIO, and 5 V tolerant SPI inputs make it easier to coexist with legacy peripherals in a mature enclosure design.
تجویز کردہ
IoT Retrofit and Educational Networking Platform
Retrofitting an existing machine or teaching embedded networking is where the ENC28J60T/SO is most often deployed, because a single chip plus a handful of passives creates a complete wired node. The SPI host interface is simple enough that even a small 8-bit microcontroller can act as a host, and the mature ecosystem of open-source drivers removes the need for a vendor TCP/IP stack. In a classroom build, the 28-SOIC package is straightforward to solder and the required external parts — 25 MHz crystal, RBIAS resistors, isolation transformer, and RJ45 jack — are all widely available. The internal DMA and checksum hardware keep tutorial-level firmware short, letting students focus on packet structure, socket programming, and web serving instead of bit-level PHY handling. For mains-adjacent equipment, add isolation and surge protection around the magnetics.
تجویز کردہ
تجویز کردہ پروڈکٹس کا خلاصہ
کے لیے انجینئرنگ ریفرنس ڈیٹا ENC28J60T/SO — موازنہ، ڈیزائن رہنمائی، اور تعمیل کی معلومات۔
انتخاب کی گائیڈ
متبادلات کے ساتھ موازنہ
| پیرامیٹر | یہ پروڈکٹ | ENC28J60T-I/SO | ENC28J60-I/SO | ENC28J60/SS |
|---|---|---|---|---|
| Package | 28-SOIC (0.295 in, 7.50 mm width) | 28-SOIC (0.295 in, 7.50 mm width) - same land pattern | 28-SOIC (0.295 in, 7.50 mm width) - same land pattern | 28-SSOP - narrower body, not a same-package drop-in |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Controller Type | Ethernet Controller, MAC/10BASE-T | Ethernet Controller 10 Base-T PHY SPI Interface | Ethernet Controller 10 Base-T PHY SPI Interface | Ethernet Controller, MAC/10BASE-T |
| Host Interface | SPI | SPI | SPI | SPI |
| Packet Buffer RAM | 8 Kbyte transmit/receive dual-port buffer SRAM | 8 Kbyte transmit/receive dual-port buffer SRAM | 8 Kbyte transmit/receive dual-port buffer SRAM | 8 Kbyte transmit/receive dual-port buffer SRAM |
| Ethernet Speed | 10BASE-T half-duplex | 10BASE-T | 10BASE-T | 10BASE-T |
| SPI Input Logic Tolerance | CS, SCK, SI and RESET inputs are 5 V tolerant | CS, SCK, SI and RESET inputs are 5 V tolerant | CS, SCK, SI and RESET inputs are 5 V tolerant | CS, SCK, SI and RESET inputs are 5 V tolerant |
اہم امتیازی خصوصیات
- Single-chip Ethernet node with integrated MAC and PHY in a 28-SOIC footprint (بمقابلہENC28J60T-I/SO)
- No host-side TCP/IP stack hardware required (بمقابلہW5500)
- Wider temperature rating than the base commercial-grade variant (بمقابلہENC28J60-I/SO)
- 5 V tolerant host-side inputs reduce level-shifter count (بمقابلہENC28J60T-I/SO)
ڈیزائن نوٹس
Treat the PHY analog section as a separate, quiet zone. Place the 25 MHz crystal, the two 1.0 uF bias capacitors, and the RBIAS network directly next to their associated pins, and route the PHY-to-transformer pair as a short, tightly coupled, 50-ohm-controlled-impedance pair on the top layer with no plane splits. Keep switching regulators, inductors, and their switch nodes on the opposite side of the board so that radiated and conducted noise does not corrupt the line-level bias current. Provide a continuous ground plane under the analog section with no voids.
Estimated: with a 3.3 V supply and 160 mA maximum supply current, the device can dissipate up to 0.53 W internally, and in typical 10BASE-T transmit bursts the average draw is lower but the peak is close to the datasheet maximum. Budget a 3.3 V regulator with at least 250 mA of headroom, and place a 0.1 uF ceramic plus a 1.0 uF bulk capacitor at the supply pins. Because the SPI outputs and interrupt are 3.3 V CMOS levels while the CS, SCK, SI and RESET inputs are 5 V tolerant, add a unidirectional level translator when the host runs at 5 V and reads SO or INT.
The most frequent design errors are the missing external isolation transformer with center-tap bias, wrong RBIAS resistor values, and missing bulk decoupling on the 3.3 V rail. A second common mistake is assuming the ENC28J60T/SO negotiates 100BASE-TX; it is 10BASE-T half-duplex only, so throughput expectations must match that link rate. Finally, do not substitute the SSOP-28 variant on a SOIC-28 board without a footprint and lead-width change, and do not exceed the 3.6 V maximum supply rating when adding the bias network.
The manufacturer datasheet notes that the silicon in some devices may differ functionally from the current data sheet and warns about the code protection feature on Microchip devices, so firmware should be validated against the shipping revision. Also remember that the ENC28J60 requires the link to be kept alive by continuous 25 MHz clocking, so the PHY section cannot be fully power-gated without link loss; design power management around that constraint rather than expecting sleep mode to free the analog bias current.
تعمیل کی معلومات
The device is IEEE 802.3 compatible as stated by the manufacturer datasheet. RoHS, REACH, lead-free, halogen-free, and conflict-minerals declarations are not published in the retrieved product pages, so they are reported as unknown rather than assumed.
