Reported by 3D InCites on 2026-10-15. Summarized and analyzed by XAIPART Editorial.
What happened
3D InCites published a technical overview of Cu-Cu hybrid bonding aimed at 2.5D and 3D packaging, drawing on material presented at IMAPS and ECTC 2026.S1 The article traces the technology from a ZiBond-plus-embedded-metal combination in 2004-2005, through Sony's 2015 high-volume production of CMOS image sensors, to current demonstrations that push interconnect pitches below 10um.S1
The source classifies hybrid bonding variants as Die-to-Die (D2D), Die-to-Wafer (D2W), and Wafer-to-Wafer (W2W), and notes that D2D is throughput-limited while W2W reduces cost but compounds die yield.S1 It reports two demonstrations at ECTC 2026: Applied Materials at 450nm pitch with 98% yield across 20M interconnects, and imec with EV Group at 200nm pitch with under 40nm overlay for 300mm W2W.S1
The article identifies CMP uniformity, surface flatness, pristine dielectric, pad alignment, and bond strength as the controlling requirements, with CMP defects including dishing (typical ~1-10 nm), dielectric trenching, and erosion driven by layout metal density.S1 A representative anneal profile steps through 150 degrees C for oxide annealing, 300 degrees C for Cu expansion, then cools to 20 degrees C; Cu-Cu annealing can run as low as 200 degrees C with tighter recess control.S1
The article also notes Adeia owns ZiBond and DBI IP originally held by Ziptronix, and that in March 2026 a patent infringement suit against AMD's 3D V-Cache was dismissed with an out-of-court multi-year license settlement; financial terms were not disclosed by the source.S1
| Metric | Reported value | Source |
|---|---|---|
| Smallest reported pitch (Applied Materials demo) | 450 nm pitch, 98% yield across 20M interconnects | S1 |
| Smallest reported pitch (imec with EV Group) | 200 nm pitch, <40 nm overlay, 300mm W2W | S1 |
| C4 bump pitch lower limit | ~50 um | S1 |
| Cu pillar pitch lower limit | ~20 um | S1 |
| Hybrid bonding pitch range stated | <10 um, down to 1 um | S1 |
| Typical CMP Cu dishing depth | ~1-10 nm | S1 |
| Cu-Cu anneal options | ~200 degrees C (slow) up to a 300 degrees C Cu step in a representative profile | S1 |
| Ziptronix acquisition price (Tessera, 2015) | $39 million | S1 |
| Adeia vs. AMD suit outcome | Dismissed March 2026 with undisclosed-terms multi-year license | S1 |
Background timeline
- - Cu-Cu hybrid bonding concept forms by combining ZiBond direct oxide bonding with embedded metal bonds, per source.
- - Tessera acquires Ziptronix for $39 million; Sony begins high-volume production of CMOS image sensors using hybrid bonding, per source.
- - Tessera acquires DTS and the parent renames to Xperi, per source.
- - Xperi merges with TiVo, per source.
- - Company separates into Xperi Inc. and Adeia Inc., with Adeia holding the IP licensing business, per source.
- - Adeia initiates patent infringement suit against AMD's 3D V-Cache processors, per source.
- - IEEE Hybrid Bonding Symposium cited as source of Fraunhofer CMP/uniformity data.
- - Adeia v. AMD suit dismissed with out-of-court settlement and multi-year license; terms not disclosed by the source.
- - Applied Materials and imec with EV Group disclose 450nm and 200nm pitch demonstrations.
XAIPART take
Technical impact
XAIPART analysis The 200nm-pitch imec with EV Group result on 300mm W2W is the headline figure for process engineers: it shows sub-micron Cu-Cu bonding is no longer a lab curiosity, but the source ties feasibility directly to under 40nm overlay, which still constrains the alignment budget available to OSAT and IDM tooling. The 98% yield across 20M interconnects at 450nm pitch from Applied Materials is the more immediate HVM-relevant data point because it aligns with the interconnect densities that high-layer-count HBM stacks and 224Gbps optical EIC/PIC interfaces will demand.
Market impact
XAIPART analysis The article's framing that hybrid bonding is not the preferred solution for all designs is a useful procurement signal: expect hybrid bonding to remain a premium, low-pitch option concentrated in HBM stacks, chiplet bridges, and co-packaged optics, while C4 and Cu-pillar TCB continue to absorb mainstream 2.5D volume. The Adeia-AMD March 2026 settlement, with undisclosed financial terms, also confirms that ZiBond/DBI IP remains an active royalty gate, which can lengthen licensing lead times for any new entrant building a hybrid-bonded chiplet product. The source itself does not give wafer-pricing, tool-throughput, or capacity numbers, so any specific cost narrative should be treated as not disclosed.
Action
XAIPART analysis Design-in teams evaluating sub-10um interconnect should plan a CMP-aware floorplan review up front, since the source ties erosion and dishing directly to layout metal density and to dummy fill strategies. Procurement should pre-qualify at least two bonding-tool vendors for D2W since the article explicitly flags D2D as throughput-limited; W2W is cheaper per stack but penalises yield. Verify any new chiplet or HBM partner's license posture with Adeia (formerly Tessera/Ziptronix/Invensas) before committing to a multi-year roadmap.
XAIPART Forecast
XAIPART analysis XAIPART expects that, within 12 months (by 2027-10-15), at least one OSAT or IDM will publish a measured yield figure at or below 500nm Cu-Cu pitch on a 300mm W2W process that is equal to or better than the 98% across 20M interconnects demonstrated by Applied Materials at ECTC 2026; if no such disclosure appears in industry conference proceedings or peer-reviewed papers by that date, this forecast is wrong. The threshold is a published yield percentage tied to a stated interconnect count and pitch, which is the same industry-checkable metric the source itself uses.
Facts are as reported by the cited source. The design-in, sourcing and forward-looking statements above are XAIPART's analysis, not the source's claims. Single-source: the entire technical and IP-history narrative comes from one 3D InCites post; the Adeia-AMD settlement terms are reported as undisclosed; the source does not provide wafer-pricing, tool-throughput, or HBM-layer-count projections, so any BOM-cost claim remains unconfirmed.
Corrections: none at publication. This brief will be updated with a timestamp if the source corrects its report.
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|---|---|---|---|
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Điều gì cần xem
| Đề xuất | Cấp độ | Bởi | Trạng thái |
|---|---|---|---|
| XAIPART expects that, within 12 months (by 2027-10-15), at least one OSAT or IDM will publish a measured yield figure at or below 500nm Cu-Cu pitch on a 300mm W2W process that is equal to or better than the 98% across... | no such disclosure appears in industry conference proceedings or peer-reviewed papers by that date | Pending |
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- Circana data shows US gaming hardware sales fell to $2.543B in 2026 YTD, with Switch 2 still leading consoles but PC content spend up 13% as memory and storage prices climb. trade
- A 3D InCites technical review of hybrid bonding defects, CMP, warpage, and annealing shows Applied Materials at 450nm pitch with 98% yield and imec at 200nm pitch on 300mm W2W.
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|---|---|---|---|---|
| Input cost | PCOPPUSDM, PALUMUSDM, PNICKUSDM | USD/mt | 52 d | |
| Supply/demand | PCU334413334413, IPG3344S | index(1982=100) / index(2017=100) | 46 d | |
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Cách sản xuất điều này
Xử lý chứng cứ — thu thập, nguồn xác thực, mô hình và cửa
| Source fetched | 3D InCites · www.3dincites.com · 20,468 chars · fetch status success |
|---|---|
| Source sanity (S1) | ok — passed before any model call (no s1_ block recorded) |
| Model / prompt | MiniMax-M3 · prompt Blog Agent - News Summary (v2.8-final) · 12,092 tokens · 34s · run completed |
| Gate | verdict pass · 6/6 applicable checks passed · spec v2.9 · C10 ratio 0.005741 · C10 rounds 0 |
| Time contract | 9 <time datetime> values in this brief — 0 violations (+08:00 or date-only) |
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