ADC/DAC
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XRD8799AIQ - 10-Bit 2MSPS 8-Ch ADC | MaxLinear/Exar | 44-PQFP
The MaxLinear XRD8799AIQ (originally Exar) is a 10-bit resolution, 2 MSPS pipelined analog-to-digital converter with an integrated 8-channel analog input multiplexer, housed in a 44-pin PQFP (10x10 mm) package. It combines low-power CMOS operation (35 mW typical active, 0.8 mW in power-down) with a wide input range spanning GND to VDD, eliminating the need for external signal-conditioning scaling on most signals. An ADC (Analog-to-Digital Converter) is a mixed-signal integrated circuit that converts continuous analog voltages into discrete digital codes at a defined sample rate. The XRD8799AIQ belongs to the multi-channel, low-power successive-approximation/pipelined ADC family - a category that sits inside the broader hierarchy of data converter -> data acquisition IC -> mixed-signal semiconductor. It is purpose-built for systems that must digitize multiple analog sources while staying within strict power and board-area budgets. Key differentiating specifications include 10-bit resolution, a 2 MHz maximum sampling rate, eight single-ended input channels routed through an on-chip mux, parallel digital output, and an input range that accepts rail-to-rail signals without external scaling. A built-in power-down mode drops consumption to 0.8 mW typical, and the device does not require an external sample-and-hold for analog signals below 100 kHz or for CCD-type signals, simplifying the analog front end and BOM cost. Architecturally, the converter uses a pipelined topology that distributes conversion work across multiple low-resolution stages, achieving higher throughput than pure SAR architectures at comparable power. The integrated 8-channel mux eliminates an external analog switch tree, reducing board space, leakage paths, and channel-to-channel crosstalk sources. The PQFP-44 package gives a generous thermal pad and 10 mm x 10 mm footprint suitable for both hand-solderable prototyping and SMT production. Typical applications include CCD signal acquisition in industrial imaging, multi-sensor data logging in process control, portable instrumentation with battery operation, and mixed-signal front ends for embedded controllers. Industrial multi-channel data-acquisition boards and portable medical monitoring devices frequently select this part for its combination of throughput and low quiescent draw. When designing with the XRD8799AIQ, note that input signals below 100 kHz do not need an external track-and-hold, but faster signals should be buffered to maintain dynamic performance. Place a 0.1 uF decoupling capacitor close to each supply pin and follow the manufacturer's reference ground layout to keep digital switching noise out of the analog path. This page synthesizes distributor pricing, pin-compatible alternatives, and practical layout notes not consolidated in the manufacturer datasheet.
XRD87L75AID-F - 8-Bit 10MSPS ADC | 20-SOIC | MaxLinear
The MaxLinear (formerly Exar) XRD87L75AID-F is a low-voltage CMOS 8-bit analog-to-digital converter with a maximum sampling rate of 10 MSPS, an internal sample-and-hold, and a single 3.3V supply rail. It is housed in a 20-pin SOIC (0.295 inch / 7.50 mm body width, D-suffix package) and is provided in tube packaging per the -F factory suffix. An 8-bit flash ADC is a type of analog-to-digital converter that uses a parallel bank of 2^n comparators to convert an input voltage into a digital code in a single clock cycle, achieving the fastest possible conversion latency at moderate resolution. Within the broader signal-chain taxonomy, the XRD87L75AID-F sits between a traditional sample-and-hold stage and a digital host (FPGA, ASIC, or microcontroller), and is a member of the speed-optimized, low-resolution ADC family used for video, instrumentation, and IF digitisation. Key features include 8-bit resolution, a 10 MHz typical sampling rate, an internal track-and-hold, an analog input range of 0V to VDD, a reference input range of 1V to VDD, and typical power dissipation of 25 mW (excluding reference current). The device is latch-up free, operates from a single 3.3V supply, and uses a parallel CMOS-compatible digital interface, which simplifies connection to modern MCUs and FPGAs without external level shifters. The device is built on an advanced 3.3V CMOS process and uses a flash architecture to deliver 10 MSPS conversion speeds. Its internal S/H function guarantees a stable sample window across rapidly-changing inputs and avoids the need for external S/H circuitry, simplifying the analog front-end. Typical applications include video digitisation, CCD imaging front-ends, digital oscilloscope front-ends, IF sampling in communications, portable instrumentation, and general-purpose high-speed data acquisition. The wide analog input range (0V to VDD) lets designers digitise single-ended signals without external attenuators. When designing with this device, ensure the analog input is properly driven (low-impedance buffer recommended) and that the reference decoupling is solid. The single 3.3V supply simplifies the power tree but requires that downstream digital logic be 3.3V tolerant. This page synthesises distributor pricing, drop-in alternatives (including the SSOP-packaged variant XRD87L75AIU-F), and practical design notes that complement the manufacturer datasheet.
XRD87L75AIP-F - 8-Bit 10MSPS ADC, 20-Pin PDIP | MaxLinear
The MaxLinear XRD87L75AIP-F is a low-voltage CMOS 8-bit high-speed analog-to-digital converter with a 10 MHz sampling rate, housed in a 20-pin PDIP through-hole package. It features a single 3.3 V supply rail, an internal sample-and-hold function, an analog input range of 0 V to VDD, and a reference input range of 1 V to VDD, achieving typical power dissipation of 25 mW excluding the external reference. What is an 8-bit ADC? An analog-to-digital converter (ADC) is a data converter that samples a continuous analog waveform and produces a discrete digital code proportional to the input voltage at each clock edge. 8-bit ADCs deliver 256 discrete codes (1 LSB = full-scale / 256), which suits digital instrumentation, video digitizing, and digital oscilloscope front ends where 8-bit dynamic range is sufficient. Within the data-converter hierarchy, an 8-bit ADC sits below SAR and pipelined converters in resolution but above flash converters in speed and below the latest 12-/14-/16-bit parts in accuracy. The 10 MSPS sampling rate places this part in the legacy high-speed, low-resolution tier used in CRT digitizers, image scanners, ultrasound receive channels, and digital IF processing. Key features include latch-up free CMOS construction, parallel digital output, single 3.3 V supply operation, internal S/H function, and a wide reference input voltage range from 1 V to VDD for design flexibility. The 2-step flash architecture minimizes comparator count while delivering 10 MSPS throughput, and the part is offered as a Pb-free (RoHS-compliant) 20-pin PDIP variant suitable for industrial, instrumentation, and test-equipment applications. The XRD87L75AIP-F integrates the input track-and-hold, reference buffer, and decoding logic on a single CMOS die, allowing direct connection to a microcontroller or DSP data bus. The 25 mW typical power consumption (excluding reference) supports portable and battery-powered instruments. The 3.3 V single supply also matches CMOS logic families, simplifying interface to FPGAs and microcontrollers without level translation. Typical applications include digital oscilloscope front ends, video digitizers, ultrasound imaging receive channels, point-of-sale barcode scanners, and industrial process control data acquisition. The wide 0 V to VDD input range allows direct sampling of single-ended signals without external signal conditioning. When designing with this part, place a 0.1 uF bypass capacitor close to the VDD pin and ensure the reference input is driven by a low-impedance source. For best linearity, route CLK and digital outputs away from the analog inputs to minimize crosstalk. This page synthesizes distributor stock levels, parametric alternatives from web cross-reference search, and engineering design notes not consolidated on the manufacturer datasheet, providing unique research value for engineers selecting a legacy 8-bit ADC.
XRD87L75AIU - 8-Bit 10MSPS ADC, 3.3V, SSOP-20 | MaxLinear
The MaxLinear XRD87L75AIU is a low-voltage, CMOS, 8-bit, high-speed analog-to-digital converter (ADC) with a 10 MSPS sampling rate, packaged in a 20-pin SSOP. Operating from a single 3.3 V supply, it features an internal sample-and-hold function, an analog input range of 0 V to VDD, and a reference input range of 1 V to VDD, dissipating a typical 25 mW (excluding reference current). What is an 8-bit ADC? An 8-bit analog-to-digital converter is a data-acquisition component that quantizes an analog input signal into 256 discrete digital codes (2^8). ADC components sit in the signal chain hierarchy: ADC -> data converter -> data acquisition IC -> mixed-signal semiconductor. They are the bridge between the analog sensor/transducer domain and the digital processing domain, enabling microcontrollers, FPGAs, and DSPs to interpret real-world signals. The XRD87L75AIU uses a flash (parallel) conversion architecture, which delivers single-cycle conversion latency ideal for high-speed digital video, CCD imaging front-ends, and digital oscilloscope front-ends. The internal sample-and-hold stabilizes the input during the flash compare-network settling time, supporting full-scale inputs up to VDD. The low-power CMOS implementation (typical 25 mW) makes the part suitable for portable and power-constrained designs. The 3.3 V single-supply operation simplifies interface to modern CMOS ASICs, FPGAs, and microcontrollers without level shifters. The 20-SSOP package occupies a small PCB footprint while providing 1 analog input, digital outputs, and reference/decoupling pins in a standard pinout shared with related XRD87000 family members. Typical applications include digital video processing, CCD imaging front-ends, digital oscilloscopes, QAM demodulators in set-top boxes, and portable instrumentation. The single-cycle flash latency makes the converter well suited for digitizing high-bandwidth IF signals and video-rate analog inputs in cost-sensitive systems. When designing with this part, place a 0.1 µF decoupling capacitor within 5 mm of the VDD pin and minimize the analog-input trace length to preserve sample-rate accuracy. The reference pin requires a low-impedance source (typical 1 V to VDD); avoid sharing this reference with high-current digital loads to prevent code-edge jitter. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
XRD87L75AIUTR-F - 8-Bit 10MSPS Flash ADC, 20-SSOP | MaxLinear
The MaxLinear XRD87L75AIUTR-F (originally Exar Corporation) is an 8-bit resolution, 10 MSPS analog-to-digital converter built on a 2-step flash architecture with an internal sample-and-hold, packaged in a 20-pin SSOP (0.209 inch / 5.30 mm width) with tape-and-reel packaging. It operates from a single 3.3 V supply, accepts a single-ended analog input from 0 V to VDD, and provides an external reference input range of 1 V to VDD for flexible full-scale setting. An ADC (Analog-to-Digital Converter) is a data acquisition integrated circuit that converts continuous analog signals into discrete binary codes at a defined sampling rate. Within the broader hierarchy, this device sits as: ADC -> data converter -> data acquisition IC -> mixed-signal semiconductor. The 2-step flash architecture is a variant of the flash ADC that halves the comparator count versus a full flash, reducing both die cost and input capacitance, while the integrated S/H eliminates the need for an external track-and-hold amplifier in most applications. Key features include 8-bit resolution at 10 MHz sampling rate, single 3.3 V supply operation with 25 mW typical power dissipation (excluding external reference current), parallel digital output interface for direct connection to microcontrollers, DSPs, or FPGAs, and latch-up free CMOS construction for robust ESD/handling performance. The internal sample-and-hold eliminates external S/H requirements and supports full Nyquist bandwidth input frequencies, making the device suitable for general-purpose digitizing tasks where cost-per-channel matters. The XRD87L75AIUTR-F architecture uses a 2-step flash topology with on-chip S/H, error correction, and a parallel CMOS-compatible output bus. Its low input capacitance and high input bandwidth reduce drive-amplifier loading, and the part is specified to operate from a single 3.3 V rail, simplifying power tree design in 3.3 V logic systems. The internal reference buffer accepts a user-supplied reference from 1 V to VDD for system-level gain calibration. The -F suffix denotes the lead-free, RoHS-compliant tape-and-reel packaging option. Typical applications include video digitizing and graphics capture, CCD/CIS sensor front-ends, digital oscilloscope front-ends, baseband IF sampling, low-cost digital imaging, and portable instrumentation. The 8-bit/10 MSPS combination aligns well with standard-definition video bandwidths (~5 MHz) and consumer imaging throughput requirements. When designing with this part, place the input RC anti-alias filter directly at the analog input pin and provide a low-impedance reference buffer because the reference pin input current scales with sampling rate. Parallel output bus traces should be length-matched and series-terminated near the ADC to limit digital switching noise coupling back into the analog input. Decouple VDD with both a 0.1 uF ceramic and a 10 uF bulk capacitor placed within 5 mm of the supply pin. This page consolidates distributor pricing, same-family MaxLinear/Exar drop-in alternatives, and practical design notes not collected in the original manufacturer datasheet, giving engineers a single reference for procurement, second-source planning, and PCB bring-up.
XRD87L99AIQ-F - 10-Bit 2 MSPS 8-Ch MUX ADC | MaxLinear
The MaxLinear XRD87L99AIQ-F is a low-power 10-bit analog-to-digital converter with an 8-channel analog input multiplexer and a 2 MSPS sampling rate, housed in a 44-pin QFP package. It operates from a single 2.7V to 5.5V supply, draws only 24 mW typical at full speed, and falls to 0.1 mW in its hardware power-down mode. The device requires no external sample-and-hold for input signals below 100 kHz or for CCD-style signals, simplifying analog front-end design. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples continuous analog voltages into a parallel digital word at a defined clock rate. ADCs sit within the broader hierarchy of data acquisition ICs -> data converters -> mixed-signal ICs -> integrated circuits, and they are the critical bridge between analog sensors and digital processors. Multi-channel, low-power ADCs like the XRD87L99AIQ-F are typically used to digitize several sensors with one converter, reducing board area, BOM cost, and software overhead in embedded designs. Key features of the XRD87L99AIQ-F include 10-bit resolution, an integrated 8-to-1 analog multiplexer with channel-address latches, a parallel microprocessor-compatible digital interface, an external reference input, and a hardware power-down pin. Its wide input range covers GND to VDD, which lets the device directly digitize rail-to-rail sensor outputs. The 44-QFP package is industry-standard and supports conventional surface-mount assembly. Typical applications for the XRD87L99AIQ-F include multi-channel data acquisition systems, CCD signal processing chains in scanner and copier subsystems, portable and battery-powered instrumentation, industrial process monitoring, and embedded control boards that need to read several analog sensors at moderate speeds. In each case the device's low power dissipation, integrated mux, and parallel interface reduce both component count and software complexity. Designers should remember that the XRD87L99AIQ-F is in EOL/last-time-buy status according to distributor lifecycle fields, so long-life designs should plan for a qualified replacement or place a last-time-buy order. Drive the analog inputs with low-impedance sources to keep the input settling error inside the 10-bit budget, and place the 0.1uF VDD decoupling capacitor within a few millimeters of the supply pin.