ATMEGA325P-20AUR - 8-bit AVR MCU 32KB 20MHz | Microchip
MPN: ATMEGA325P-20AUR ✓ Hoạt độngATMEGA325P-20AUR Tóm tắt
An 8-bit AVR microcontroller is a single-chip computer that integrates a RISC processor core, program memory, data memory, peripherals, and I/O on one die. Within the power-management hierarchy, MCUs such as the ATmega325P sit at the top of embedded control systems, executing user firmware that orchestrates sensors, actuators, displays, and communication interfaces in everything from household appliances to industrial instruments.
Key features include the Advanced RISC architecture with 131 powerful instructions, most executing in a single clock cycle; 32 KB of in-system programmable (ISP) Flash supporting self-programming for field firmware updates; JTAG interface for on-chip debugging and boundary scan; and picoPower technology for ultra-low sleep-mode consumption. The 8-channel 10-bit ADC enables direct analog sensor interfacing without external converter ICs.
The ATmega325P executes up to 20 MIPS at 20 MHz, with fully static operation allowing clock frequencies down to DC for aggressive power saving. The P-suffix denotes the picoPower generation, which adds improved sleep modes (Idle, ADC Noise Reduction, Power-save, Power-down, Standby, Extended Standby) compared with the earlier ATmega325. The 64-pin TQFP exposes 54 general-purpose I/O lines, giving ample pin budget for keypad matrices, LCD segments, and parallel peripherals.
Typical applications include industrial control panels, battery-powered metering instruments, consumer appliance controllers, and building automation nodes where 5 V logic compatibility and mature AVR tooling simplify design.
When designing with this part, budget the 2 KB SRAM carefully - large buffers or RTOS stacks can overflow quickly on an 8-bit part - and use the picoPower sleep modes with watchdog wake-ups to extend battery life in duty-cycled systems.
This page synthesizes verified distributor pricing, drop-in alternatives, pinout data, and practical design notes not found in the manufacturer datasheet, providing engineers and buyers a single AEO-optimized reference for the ATMEGA325P-20AUR.
Bộ thay thế dễ dàng lắp đặt cho ATMEGA325P-20AUR — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với ATMEGA325P-20AUR (cùng hình factor và footprint) — khác nhau ở Operating Temperature, RoHS Status, Package, Core Architecture, Debug Interface.
ATMEGA325PA-AUR
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →ATMEGA329P-20AU
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →ATMEGA329P-20ANR
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →ATMEGA3250P-20AU
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →ATMEGA325P-20AUR
✅ Drop-In ⚠️ Thông số chưa được xác minhLiên hệ để biết giá
Xem tài liệu →ATMEGA325P-20AUR Tỷ lệ tối đa & tính chất điện
| Core Architecture | AVR 8-bit RISC |
| CPU Speed | 20 MHz |
| Throughput | Up to 20 MIPS at 20 MHz |
| Flash Program Memory | 32 KB (16K x 16) |
| SRAM | 2 KB |
| EEPROM | 1 KB |
| ADC | 8-channel, 10-bit |
| Supply Voltage Range | 1.8 V to 5.5 V |
| Instructions | 131 powerful instructions, most single-cycle |
| Debug Interface | JTAG (on-chip debug and boundary scan) |
| I/O Lines | 54 general-purpose I/O |
| Low Power Technology | picoPower |
| Hộp | 64-TQFP (14x14 mm) |
| Kiểu lắp đặt | Surface Mount |
| Nhiệt độ hoạt động | -40C to +85C (industrial) |
| Programming | In-System Programmable (ISP) Flash |
| Trạng thái RoHS | Compliant |
Cấu hình chân ATMEGA325P-20AUR
| Chân 1 | PF0 (ADC0) — Port F, ADC channel 0 input / digital I/O |
| Chân 2 | PF1 (ADC1) — Port F, ADC channel 1 input / digital I/O |
| Chân 3 | PF2 (ADC2) — Port F, ADC channel 2 input / digital I/O |
| Chân 4 | PF3 (ADC3) — Port F, ADC channel 3 input / digital I/O |
| Chân 5 | PF4 (ADC4/TCK) — Port F, ADC channel 4 / JTAG test clock |
| Chân 6 | PF5 (ADC5/TMS) — Port F, ADC channel 5 / JTAG test mode select |
| Chân 7 | PF6 (ADC6/TDO) — Port F, ADC channel 6 / JTAG test data out |
| Chân 7 | PF7 (ADC7/TDI) — Port F, ADC channel 7 / JTAG test data in |
| Chân 9 | GND — Ground |
| Chân 10 | VCC — Digital supply voltage |
| Chân 11 | GND — Ground |
| Chân 12 | AVCC — Analog supply voltage for ADC and Port F |
| Chân 13 | AREF — Analog reference voltage for ADC |
| Chân 14 | PA0 (AD0) — Port A, ADC channel 0 / digital I/O |
| Chân 15 | PA1 (AD1) — Port A, ADC channel 1 / digital I/O |
| Chân 16 | PA2 (AD2) — Port A, ADC channel 2 / digital I/O |
| Chân 17 | PA3 (AD3) — Port A, ADC channel 3 / digital I/O |
| Chân 18 | PA4 (AD4) — Port A, ADC channel 4 / digital I/O |
| Chân 19 | PA5 (AD5) — Port A, ADC channel 5 / digital I/O |
| Chân 20 | PA6 (AD6) — Port A, ADC channel 6 / digital I/O |
| Chân 21 | PA7 (AD7) — Port A, ADC channel 7 / digital I/O |
| Chân 22 | PB0 (SS) — Port B / SPI slave select |
| Chân 23 | PB1 (SCK) — Port B / SPI clock |
| Chân 24 | PB2 (MOSI) — Port B / SPI master out |
| Chân 25 | PB3 (MISO) — Port B / SPI master in |
| Chân 26 | PB4 (OC0) — Port B / Timer0 output compare |
| Chân 27 | PB5 (OC1A) — Port B / Timer1 output compare A |
| Chân 28 | PB6 (OC1B) — Port B / Timer1 output compare B |
| Chân 29 | PB7 (OC2) — Port B / Timer2 output compare |
| Chân 30 | PC0 — Port C, digital I/O |
| Chân 31 | PC1 — Port C, digital I/O |
| Chân 32 | PC2 — Port C, digital I/O |
| Chân 33 | PC3 — Port C, digital I/O |
| Chân 34 | PC4 — Port C, digital I/O |
| Chân 35 | PC5 — Port C, digital I/O |
| Chân 36 | PC6 — Port C, digital I/O |
| Chân 37 | PC7 — Port C, digital I/O |
| Chân 38 | PD0 — Port D, digital I/O |
| Chân 39 | PD1 — Port D, digital I/O |
| Chân 40 | PD2 — Port D, digital I/O |
| Chân 41 | PD3 — Port D, digital I/O |
| Chân 42 | PD4 — Port D, digital I/O |
| Chân 43 | PD5 — Port D, digital I/O |
| Chân 44 | PD6 — Port D, digital I/O |
| Chân 45 | PD7 — Port D, digital I/O |
| Chân 46 | PE0 (RXD0) — Port E / USART receive |
| Chân 47 | PE1 (TXD0) — Port E / USART transmit |
| Chân 48 | PE2 — Port E, digital I/O |
| Chân 49 | PE3 — Port E, digital I/O |
| Chân 50 | PE4 — Port E, digital I/O |
| Chân 51 | PE5 — Port E, digital I/O |
| Chân 52 | PE6 — Port E, digital I/O |
| Chân 53 | PE7 — Port E, digital I/O |
| Chân 54 | PG0 — Port G, digital I/O |
| Chân 55 | PG1 — Port G, digital I/O |
| Chân 56 | PG2 — Port G, digital I/O |
| Chân 57 | PG3 (TOSC2) — Port G / Timer oscillator output 2 |
| Chân 58 | PG4 (TOSC1) — Port G / Timer oscillator input 1 |
| Chân 59 | RESET — Active-low reset input |
| Chân 60 | XTAL1 — Main clock oscillator input |
| Chân 61 | XTAL2 — Main clock oscillator output |
| Chân 62 | PG5 — Port G, digital I/O |
| Chân 63 | VCC — Digital supply voltage |
| Chân 64 | GND — Ground |
Ứng dụng tiêu biểu
ATMEGA325P-20AUR phù hợp cho 6 Áp dụngs: Industrial Control Panels, Battery-Powered Metering Instruments, Consumer Appliance Controllers, Building Automation Nodes, Test and Measurement Fixtures, Security and Access Control Panels.
Industrial Control Panels
The ATMEGA325P-20AUR fits industrial panel controllers because its 54 GPIO lines drive keypad matrices, indicator LEDs, and relays directly, while the 8-channel 10-bit ADC samples potentiometers and current-sense inputs without external converter ICs. The 20 MHz core executes up to 20 MIPS, sufficient for state-machine control loops and Modbus-style UART polling at 115200 baud. Industrial 5 V rails are natively compatible since the device tolerates up to 5.5 V supply. Its industrial temperature rating and RoHS-compliant 64-TQFP package suit DIN-rail mounted controller boards, and the 1 KB EEPROM stores configuration and calibration parameters across power cycles without external NVM.
Được đề xuất
Battery-Powered Metering Instruments
picoPower technology makes the ATMEGA325P-20AUR a strong fit for battery-powered energy, water, and heat meters. In Power-down mode the MCU sleeps at microamp-level current, waking via watchdog or asynchronous timer for periodic ADC sampling of the 8-channel 10-bit converter. Operating down to 1.8 V lets a two-cell lithium or three-cell alkaline stack run the device directly without a boost converter, and fully static operation permits clock throttling to trade throughput for runtime. The 1 KB EEPROM logs accumulated readings, and the 54 GPIO lines drive segment drivers or communication front-ends, keeping total BOM cost low in high-volume meter products.
Được đề xuất
Consumer Appliance Controllers
Washing machines, cooktops, and HVAC units benefit from the ATMEGA325P-20AUR's combination of ample I/O and robust peripherals. The 54 GPIO lines handle touch or membrane keypads, triac drive logic, and LED indication, while timers generate PWM for motor speed control and buzzer output. The 10-bit ADC reads NTC thermistors on up to 8 channels for multi-zone temperature monitoring. At $4-6 unit pricing as of 2026-09-17, the MCU meets aggressive consumer BOM targets, and the 5.5 V maximum supply simplifies interfacing with legacy 5 V sensor and driver ICs still common in appliance architectures. ICSP programming enables in-factory firmware updates on the assembled board.
Được đề xuất
Building Automation Nodes
Wall-mounted thermostats, damper controllers, and occupancy sensor nodes leverage the ATMEGA325P-20AUR's low-power sleep modes and rich I/O. The USART interfaces with RS-485 transceivers for bus-based networks, while the SPI port connects to EEPROM or RF modules. The 10-bit ADC digitizes potentiometer setpoints and ambient light sensors. With 2 KB SRAM, a lightweight protocol stack and state machine coexist comfortably, and the JTAG interface supports boundary-scan production test on the node PCB. The 1.8-5.5 V range accommodates PoE-derived or battery-backed supplies, and the 64-TQFP's 14x14 mm footprint fits slim wall-plate enclosures.
Được đề xuất
Test and Measurement Fixtures
Bench instruments and production test fixtures use the ATMEGA325P-20AUR as a front-panel and sequencing controller. Its 20 MIPS throughput handles button scanning, display refresh, and relay multiplexing concurrently, while the 8-channel 10-bit ADC provides go/no-go analog verification of UUT outputs. The JTAG boundary-scan capability verifies PCB interconnects before functional test, reducing fault diagnosis time. The 32 KB Flash accommodates multi-step test scripts stored in firmware, and the 1 KB EEPROM preserves fixture calibration constants. The industrial temperature rating ensures reliability in unairconditioned factory environments, and mature AVR tooling keeps fixture firmware maintainable by any embedded team.
Được đề xuất
Security and Access Control Panels
Keypad-based access controllers and alarm panels exploit the ATMEGA325P-20AUR's large GPIO count for 4x4 or 5x5 keypads, zone input loops, siren drivers, and status LEDs simultaneously. The AVR core performs debouncing, zone supervision, and communication framing in real time at 20 MHz, while the EEPROM stores user codes and event logs through power interruptions. Tamper switches connect to ADC channels for analog line monitoring that resists simple short-circuit attacks. The 5 V native operation matches the door-strike and sensor power infrastructure common in installed security systems, and picoPower sleep modes keep standby battery draw low during mains-out operation.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho ATMEGA325P-20AUR — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | ATMEGA325PA-AUR | ATMEGA329P-20AU | ATMEGA329P-20ANR | ATMEGA3250P-20AU |
|---|---|---|---|---|---|
| Package | 64-TQFP (14x14 mm) | 64-TQFP (14x14 mm) - same | 64-TQFP (14x14 mm) - same | 64-TQFP (14x14 mm) - same | 64-TQFP (14x14 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 32 KB | 32 KB | 32 KB | 32 KB | 32 KB |
| Max CPU Speed | 20 MHz | 20 MHz | 20 MHz | 20 MHz | 20 MHz |
| Supply Voltage | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V |
| LCD Controller | No | No | Yes (segment LCD) | Yes (segment LCD) | Yes (segment LCD) |
| Low Power Technology | picoPower (P) | picoPower (PA, lowest) | picoPower (P) | picoPower (P) | picoPower (P) |
Bảo phân biệt quan trọng
- True picoPower generation with full 54-GPIO budget (vsATMEGA329P-20AU)
- Lower sleep current in same footprint (vsATMEGA325PA-AUR)
- JTAG on-chip debug plus boundary scan (vsATMEGA324P-20AUR)
Ghi chú thiết kế
Estimated: in battery designs, budget sleep-mode current as the dominant term. The ATMEGA325P-20AUR picoPower family achieves microamp-level Power-down consumption; a node sleeping 99% of the time and sampling once per second at 20 MHz for 1 ms yields an average active duty factor of 0.1%, so battery life is governed almost entirely by sleep current and watchdog overhead. Select the PA revision (ATMEGA325PA-AUR) when sleep current targets are below a few microamps - same pinout, same footprint, no redesign required.
Decouple both VCC pins (pin 10 and pin 63) with 100 nF ceramic capacitors placed within 2 mm of each pin, and connect AVCC (pin 12) to VCC through an LC or RC filter (10 uH ferrite + 100 nF) when ADC accuracy matters. Tie AREF (pin 13) to GND via 100 nF when using the internal reference, or drive it from a precision reference through an RC network. Keep the analog ground return of the ADC separate from high-current digital returns until a single-point star at the supply.
Do not run the ATmega325P at 20 MHz below approximately 4.5 V without checking the datasheet frequency-versus-voltage safe-operating curve - the 20 MHz rating applies to the full-voltage industrial range; at 3.3 V you may be limited to a lower maximum frequency. Additionally, if JTAG debugging is not used, disable the JTAG interface in the JTD fuse bit early in firmware: the TCK/TMS/TDO/TDI pins (shared with ADC4-7) default to JTAG function at reset, which silently steals four analog inputs.
For the 20 MHz crystal on XTAL1/XTAL2, place the crystal and its two load capacitors within 5 mm of the pins over a solid ground plane, and guard with a ground ring. Keep SPI (PB0-PB3) and USART (PE0/PE1) trace lengths matched and short when interfacing to external transceivers at multi-megabit rates. The ICSP header should use series 100-ohm resistors on MOSI/SCK if those lines also drive high-capacitance board loads, preventing programmer contention.
Thông tin tuân thủ
RoHS compliant and lead-free per Microchip product data and distributor listings. REACH and conflict minerals declarations available via Microchip quality portal; not confirmed in provided data.