PIC17LC766-08I/L - 8-Bit 8MHz 32KB OTP MCU | Microchip | 84-PLCC
MPN: PIC17LC766-08I/L ✓ Hoạt độngPIC17LC766-08I/L Tóm tắt
An 8-bit microcontroller (MCU) is a programmable processor built around an 8-bit data bus, combining CPU, RAM, non-volatile program memory, and peripherals on a single die. PIC17C-series parts sit at the top of Microchip's 8-bit hierarchy (PIC10/12/16/17/18), pairing a RISC instruction set with a 16-bit-wide program word to maximize code density and execution speed.
Key features of the PIC17LC766 include a built-in 10-bit A/D converter, a single-cycle 8x8 hardware multiplier, two-cycle branch and table-read/write operations, an industrial operating temperature range (-40C to +85C), and an LC (low-power CMOS) core designed for 2.5V to 5.5V operation. The 'L' suffix denotes the 84-pin PLCC J-lead surface-mount package, and 'I' marks the industrial temperature grade.
The architecture combines a Harvard bus (separate program and data paths) with a 16-bit instruction word and 58 single-word instructions, simplifying code development while delivering predictable real-time performance. The 8x8 hardware multiplier and 16-level hardware stack accelerate math-intensive and interrupt-driven control loops.
Typical applications include industrial control systems, motor control front-ends, instrumentation with on-chip A/D, embedded data acquisition, and legacy equipment retrofits. Designers select the PIC17LC766 when 8-bit simplicity, OTP memory, and high I/O count are required.
When designing in this MCU, note that OTP memory cannot be re-programmed in-circuit; use the JW (windowed) or QFP variants for prototyping. The 84-pin PLCC requires a socket or reflow profile suited to J-leaded SMT packages.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, giving engineers a single reference for sourcing PIC17LC766-08I/L.
Bộ thay thế dễ dàng lắp đặt cho PIC17LC766-08I/L — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC17LC766-08I/L (cùng hình factor và footprint) — khác nhau ở Package, Core Architecture, Data Bus Width, I/O Pins, ADC.
PIC17LC766T-08I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC17LC756A-08I/L
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
PIC17LC752T-08I/L
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC17C766-16I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC17C762-16I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC17LC756AT-08I/L
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC17LC766-08I/L Tỷ lệ tối đa & tính chất điện
| Product Family | PIC17C |
| Core | 8-bit RISC (Harvard) |
| Bề rộng đường dữ liệu | 8-bit |
| Instruction Word Width | 16-bit |
| Program Memory Type | OTP EPROM |
| Program Memory Size | 32 KB (16K x 16) |
| RAM Size | 902 bytes |
| Maximum Clock Input | 33 MHz |
| Instruction Cycle Time | 121 ns (single-cycle) |
| ADC | 10-bit on-chip |
| I/O Pins | 66 |
| Number of Instructions | 58 single-word |
| Hardware Multiplier | 8 x 8 single-cycle |
| Điện áp cung cấp | 2.5 V to 5.5 V (3.3 V / 5 V typical) |
| Nhiệt độ hoạt động | -40 C to +85 C (industrial) |
| Hộp | 84-pin PLCC (J-lead, 29.31 x 29.31 mm) |
| Cấp MSL | 3 (168 hours) |
Cấu hình chân PIC17LC766-08I/L
| Chân 1 | RA0/AN0 — Port A bit 0 / Analog input 0 |
| Chân 2 | RA1/AN1 — Port A bit 1 / Analog input 1 |
| Chân 3 | RA2/AN2 — Port A bit 2 / Analog input 2 |
| Chân 4 | RA3/AN3 — Port A bit 3 / Analog input 3 |
| Chân 5 | RA4/AN4 — Port A bit 4 / Analog input 4 |
| Chân 6 | RA5/AN5 — Port A bit 5 / Analog input 5 |
| Chân 7 | RA6/AN6 — Port A bit 6 / Analog input 6 |
| Chân 8 | RA7/AN7 — Port A bit 7 / Analog input 7 |
| Chân 9 | RB0/INT — Port B bit 0 / External interrupt |
| Chân 10 | RB1 — Port B bit 1 |
| Chân 11 | RB2 — Port B bit 2 |
| Chân 12 | RB3 — Port B bit 3 |
| Chân 13 | RB4 — Port B bit 4 |
| Chân 14 | RB5 — Port B bit 5 |
| Chân 15 | RB6 — Port B bit 6 |
| Chân 16 | RB7 — Port B bit 7 |
| Chân 17 | RC0 — Port C bit 0 |
| Chân 18 | RC1 — Port C bit 1 |
| Chân 19 | RC2 — Port C bit 2 |
| Chân 20 | RC3 — Port C bit 3 |
| Chân 21 | RC4 — Port C bit 4 |
| Chân 22 | RC5 — Port C bit 5 |
| Chân 23 | RC6 — Port C bit 6 |
| Chân 24 | RC7 — Port C bit 7 |
| Chân 25 | RD0 — Port D bit 0 |
| Chân 26 | RD1 — Port D bit 1 |
| Chân 27 | RD2 — Port D bit 2 |
| Chân 28 | RD3 — Port D bit 3 |
| Chân 29 | RD4 — Port D bit 4 |
| Chân 30 | RD5 — Port D bit 5 |
| Chân 31 | RD6 — Port D bit 6 |
| Chân 32 | RD7 — Port D bit 7 |
| Chân 33 | RE0 — Port E bit 0 |
| Chân 34 | RE1 — Port E bit 1 |
| Chân 35 | RE2 — Port E bit 2 |
| Chân 36 | RE3 — Port E bit 3 |
| Chân 37 | RE4 — Port E bit 4 |
| Chân 38 | RE5 — Port E bit 5 |
| Chân 39 | RE6 — Port E bit 6 |
| Chân 40 | RE7 — Port E bit 7 |
| Chân 41 | RF0 — Port F bit 0 |
| Chân 42 | RF1 — Port F bit 1 |
| Chân 43 | RF2 — Port F bit 2 |
| Chân 44 | RF3 — Port F bit 3 |
| Chân 45 | RF4 — Port F bit 4 |
| Chân 46 | RF5 — Port F bit 5 |
| Chân 47 | RF6 — Port F bit 6 |
| Chân 48 | RF7 — Port F bit 7 |
| Chân 49 | RG0 — Port G bit 0 |
| Chân 50 | RG1 — Port G bit 1 |
| Chân 51 | RG2 — Port G bit 2 |
| Chân 52 | RG3 — Port G bit 3 |
| Chân 53 | RG4 — Port G bit 4 |
| Chân 54 | OSC1 — Oscillator input |
| Chân 55 | OSC2 — Oscillator output |
| Chân 56 | NC — Not connected (per datasheet) |
| Chân 57 | NC — Not connected (per datasheet) |
| Chân 58 | MCLR — Master clear reset (active low) |
| Chân 59 | VSS — Ground reference |
| Chân 60 | VDD — Positive supply voltage |
| Chân 61 | VSS — Ground reference |
| Chân 62 | VDD — Positive supply voltage |
| Chân 63 | T0CKI — Timer 0 clock input |
| Chân 64 | T1CKI — Timer 1 clock input |
| Chân 65 | CCP1 — Capture/Compare/PWM 1 |
| Chân 66 | CCP2 — Capture/Compare/PWM 2 |
| Chân 67 | TX/CK — USART transmit / clock |
| Chân 68 | RX/DT — USART receive / data |
| Chân 69 | SS — SPI slave select |
| Chân 70 | SDO — SPI serial data out |
| Chân 71 | SDI — SPI serial data in |
| Chân 72 | SCK — SPI serial clock |
| Chân 73 | SCL — I2C clock (peripheral mode) |
| Chân 74 | SDA — I2C data (peripheral mode) |
| Chân 75 | NC — Not connected (per datasheet) |
| Chân 76 | NC — Not connected (per datasheet) |
| Chân 77 | NC — Not connected (per datasheet) |
| Chân 78 | NC — Not connected (per datasheet) |
| Chân 79 | NC — Not connected (per datasheet) |
| Chân 80 | NC — Not connected (per datasheet) |
| Chân 81 | NC — Not connected (per datasheet) |
| Chân 82 | NC — Not connected (per datasheet) |
| Chân 83 | NC — Not connected (per datasheet) |
| Chân 84 | NC — Not connected (per datasheet) |
Ứng dụng tiêu biểu
PIC17LC766-08I/L phù hợp cho 6 Áp dụngs: Industrial Control Systems, Motor Control Front-Ends, Data Acquisition and Instrumentation, Legacy Equipment Retrofit, Embedded Sensor Hubs, Automotive Body Electronics (Non-Safety).
Industrial Control Systems
The PIC17LC766-08I/L fits industrial control boards because its 66 digital I/O lines drive relays, solenoid drivers, optocouplers, and indicator LEDs from a single chip, while the on-chip 10-bit ADC reads 4-20 mA loop, thermistor, or potentiometer feedback. Operating from 2.5 V to 5.5 V, the LC core tolerates supply sag common in 24 V industrial buses stepped down to 5 V, and the industrial -40 C to +85 C grade survives factory-floor thermal stress. The 32 KB OTP memory holds ladder-logic or state-machine code for PLCs, motor starters, and process controllers; the 902-byte RAM buffers scan tables without external expansion. Estimated code size for typical PID control loops fits under 16 KB, leaving headroom for diagnostics.
Được đề xuất
Motor Control Front-Ends
The PIC17LC766-08I/L serves as the control front-end for stepper and DC brush motors because its 8x8 single-cycle hardware multiplier accelerates PI loop math and its 66 I/O pins support multiple PWM, quadrature encoder, and limit-switch inputs simultaneously. The 121 ns instruction cycle provides deterministic loop timing critical for field-oriented control, while OTP memory ensures firmware integrity in vibration-prone mounting. The LC variant's 2.5 V to 5.5 V supply range allows direct operation from a regulated 3.3 V bus, reducing thermal load in enclosed motor housings. Estimated: at 8 MIPS, a 1 kHz control loop consumes approximately 12 percent of CPU bandwidth, leaving cycles for housekeeping.
Được đề xuất
Data Acquisition and Instrumentation
The PIC17LC766-08I/L is a fit for bench-top and panel-mount instrumentation because the on-chip 10-bit ADC digitizes multiple analog channels without external converter hardware, reducing BOM cost and PCB area. The 32 KB OTP memory stores calibration tables, linearization routines, and front-panel menu logic for digital multimeters, weigh scales, and process indicators. The Harvard bus architecture ensures deterministic ADC-to-display response time, important for reading stability. The LC core's low-voltage operation extends battery life in portable calibrators; the 902-byte RAM buffers sample bursts up to 4 kS/s before forwarding via UART. Estimated: storing 256 samples of 10-bit ADC data occupies 512 bytes of the 902-byte RAM budget.
Được đề xuất
Legacy Equipment Retrofit
The PIC17LC766-08I/L is used to modernize installed equipment because the 84-pin PLCC package matches the footprint of legacy PIC17C766 sockets, allowing drop-in upgrade without board rework. Designers can port existing PIC17 assembly code directly to the LC variant for lower power operation while preserving peripheral behavior. The OTP memory retains firmware without battery backup, suitable for retrofitting HVAC controllers, elevator panels, and industrial printers. Estimated: a typical PIC17C766 socket conversion requires only firmware recompilation; no schematic or PCB changes are needed when the LC grade replaces the standard C grade in 5 V systems.
Được đề xuất
Embedded Sensor Hubs
The PIC17LC766-08I/L serves embedded sensor hubs because its 66 I/O lines multiplex multiple SPI, I2C, and UART sensor channels to a host processor, while the on-chip 10-bit ADC adds local analog sampling for redundancy. The 32 KB OTP memory holds sensor-fusion and self-test code, and the 8 MIPS throughput sustains 100 Hz update rates for IMU, pressure, and flow sensor arrays. The LC variant operates from 2.5 V, making it compatible with single-cell Li-ion powered sensor nodes. Estimated: at 100 Hz update rate with 4 sensor reads per cycle, CPU utilization remains below 30 percent, leaving headroom for diagnostics and communications.
Được đề xuất
Automotive Body Electronics (Non-Safety)
The PIC17LC766-08I/L fits automotive body-electronics modules (window controllers, seat adjusters, mirror positioners) because its 66 I/O lines drive multiple brushed-DC loads directly through MOSFET drivers, while the 10-bit ADC reads current-sense feedback. The industrial -40 C to +85 C temperature range covers cabin and underhood-adjacent environments. The OTP memory ensures firmware cannot be erased by voltage transients on the 12 V battery bus (post-regulation). Estimated: at VIN = 5 V regulated, I/O pin current of 25 mA per pin supports direct LED indicator drive without buffer transistors on standard lighting nodes.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC17LC766-08I/L — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC17LC766T-08I/PT | PIC17LC756A-08I/L | PIC17LC752T-08I/L | PIC17C766-16I/PT | PIC17C762-16I/PT | PIC17LC756AT-08I/L |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 84-pin PLCC (J-lead) | 84-pin PLCC | 84-pin PLCC (J-lead) | 84-pin PLCC (J-lead) | 84-pin PLCC | 84-pin PLCC | 84-pin PLCC (J-lead) |
| Program Memory | 32 KB OTP | 32 KB OTP | 32 KB OTP | 16 KB OTP (-50%) | 32 KB OTP | 16 KB OTP (-50%) | 32 KB OTP |
| RAM Size | 902 bytes | 902 bytes | 902 bytes | 454 bytes (-50%) | 902 bytes | 454 bytes (-50%) | 902 bytes |
| Maximum Clock Input | 33 MHz | 33 MHz | 33 MHz | 33 MHz | 33 MHz | 33 MHz | 33 MHz |
| Instruction Cycle | 121 ns (8 MIPS) | 121 ns (8 MIPS) | 121 ns (8 MIPS) | 121 ns (8 MIPS) | 121 ns (8 MIPS @ 16 grade) | 121 ns (8 MIPS @ 16 grade) | 121 ns (8 MIPS) |
| Supply Voltage | 2.5 V to 5.5 V (LC) | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 4.5 V to 5.5 V (standard C) | 4.5 V to 5.5 V (standard C) | 2.5 V to 5.5 V |
| I/O Pins | 66 | 66 | 66 | 66 | 66 | 66 | 66 |
| On-Chip ADC | 10-bit | 10-bit | 10-bit | 10-bit | 10-bit | 10-bit | 10-bit |
Bảo phân biệt quan trọng
- Largest OTP program memory in the PIC17 84-pin PLCC family (vsPIC17LC752T-08I/L)
- Low-voltage LC core for portable and battery-backed designs (vsPIC17C766-16I/PT)
- Full 66 I/O count with 10-bit ADC and 8x8 hardware multiplier (vsPIC17C762-16I/PT)
Ghi chú thiết kế
The PIC17LC766-08I/L requires a decoupling capacitor within 5 mm of each VDD/VSS pair. Use a 100 nF X7R ceramic in parallel with a 10 uF tantalum or low-ESR electrolytic bulk capacitor on the main 5 V rail. The LC core draws higher transient current during table-read and table-write operations (two-cycle instructions) because the 16-bit program word is fetched in a single bus cycle - inadequate bulk capacitance causes VDD droop that resets the part on heavy flash activity.
Place the 33 MHz crystal or resonator within 10 mm of the OSC1 and OSC2 pins and guard the traces with a ground pour. The MCLR pin requires a 10 kohm pull-up to VDD and a 100 nF capacitor to ground for in-circuit programming; route the MCLR trace away from high-frequency switching nodes to avoid spurious resets during PWM transitions. The 84-pin PLCC J-lead footprint requires careful reflow profile control - peak temperature should not exceed 245 C to prevent J-lead lifting.
OTP memory cannot be re-programmed in-circuit; design the firmware image carefully before committing to a production lot and use the JW (windowed) ceramic variant for development. The 'LC' process variant operates down to 2.5 V but the brown-out reset (BOR) and ADC reference accuracy are derated below 3.0 V - if precision analog readings are required, supply at least 3.3 V regulated. Programming voltage on MCLR must reach 13 V for OTP write; confirm the production programmer supports the PIC17C76x family before scheduling the assembly run.
Thông tin tuân thủ
RoHS and REACH compliance per Microchip product declaration. The PIC17LC766-08I/L is not AEC-Q100 qualified; for automotive applications consult Microchip's PIC18F automotive portfolio.
