10AS032E4F27E3SG vs 10AS032E4F27I3LG 比較
詳細並排比較 10AS032E4F27E3SG 由 Altera 與 10AS032E4F27I3LG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AS032E4F27E3SG | 10AS032E4F27I3LG |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 320,000 | 320,000 |
| Process Technology | 20 nm | 20 nm |
| Core Voltage | 0.9 V | — |
| 封裝 | 672-FBGA, FC (27x27 mm) | 672-pin FCBGA (F27, 27x27 mm) |
| 腳位數 | 672 | — |
| Speed Grade | E4 (commercial) | E4 (-4, mid-tier) |
| 工作溫度 | 0C to +100C (commercial) | — |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 1.5 GHz | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Package Type | FC-FBGA (flip-chip fine-pitch BGA) | — |
| RoHS 狀態 | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| MSL 等級 | 3 | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |
| Hard Processor Subsystem (HPS) | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency | — | 1.5 GHz |
| Temperature Grade | — | Industrial (-40C to +100C) |
| Transceivers | — | Up to 24 channels, up to 14.1 Gbps (family-level) |
| DSP Blocks | — | Hardened floating-point DSP (family-level) |
| Memory Interfaces | — | DDR3 / DDR4 with hard controllers (family-level) |
| Configuration Method | — | JTAG, ASx4, FPP (family-level) |