10AS032H2F35E2SG vs 10AS032H1F35E1HG 比較
詳細並排比較 10AS032H2F35E2SG 由 Intel 與 10AS032H1F35E1HG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AS032H2F35E2SG | 10AS032H1F35E1HG |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | Arria 10 SX | Arria 10 SX |
| Family | 10AS032 (F35 package) | — |
| Core Type | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 320K | 320K |
| Core Frequency | 1.5 GHz (HPS) | — |
| 封裝 | 1152-FCBGA, FC (35x35 mm) | 1152-FBGA, FC (Flip-Chip BGA), 35x35 mm |
| 腳位數 | 1152 | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Temperature Grade | E2 (industrial / extended) | — |
| Speed Grade | H2 | — |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| 供應電壓 | [DATA_NEEDED: core/IO/transceiver voltage] | — |
| DSP Blocks | Variable-precision hardened DSP blocks | Variable-precision DSP blocks |
| Transceivers | Multi-gigabit transceivers (per Arria 10 family) | Multi-gigabit transceivers (up to 24 channels, family-wide) |
| Hard Memory Controllers | DDR3/DDR4 hard controllers | — |
| PCI Express | Hard IP for PCIe Gen2/Gen3 | — |
| Embedded Memory | On-chip M20K + MLAB memory | M20K blocks (variable, density per family) |
| RoHS 狀態 | Compliant | Compliant |
| Process Technology | 20 nm | 20nm TSMC |
| Design Tool | Intel Quartus Prime | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | System on Chip (SoC) FPGA |
| Hard Processor Subsystem (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| User I/O Count | — | 384 |
| External Memory Interfaces | — | DDR4, DDR3, RLDRAM3, QDRII+ |
| Hard Memory Controller | — | Yes |
| Hard PCIe | — | PCI Express Gen3 controllers (hard IP) |
| Partial Reconfiguration | — | Supported |
| 工作溫度 | — | Industrial / Extended grade (per part suffix) |
| Lead-Free | — | Yes |