10AS032H2F35I2LG vs 10AS032H4F35I3LG 比較
詳細並排比較 10AS032H2F35I2LG 由 Altera 與 10AS032H4F35I3LG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AS032H2F35I2LG | 10AS032H4F35I3LG |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria 10 SX | Arria 10 SX SoC FPGA |
| Device Variant | 10AS032 (320K Logic Elements) | 10AS032 (Logic Density 320K LE) |
| Architecture | SoC FPGA (FPGA + Hard Processor System) | — |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 320 K | 320,000 |
| Maximum Logic Performance | 1.5 GHz | — |
| 封裝 | 1152-FBGA, FC (Flip-Chip), 35x35 mm (F35) | 1152-pin FC-FBGA (F35, 35x35 mm) |
| 安裝類型 | Surface Mount | Surface Mount (flip-chip BGA) |
| Operating Temperature Grade | Industrial (I2 suffix) | Industrial (-40C to +100C) |
| RoHS 狀態 | Compliant | Compliant (per Altera product page) |
| Lead Free | Yes | — |
| MSL 等級 | [DATA_NEEDED: MSL Level] | — |
| Number of Terminals | 1152 (Ball) | — |
| Terminal Form | Ball | — |
| Package Code | BGA (FCBGA) | — |
| Process Technology | [DATA_NEEDED: Process Node] | 20 nm |
| Hard Processor System (HPS) | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| Transceivers | — | Multi-protocol, up to 12.5 Gbps |
| Memory Controller | — | Hard DDR3/DDR4 controller in HPS and fabric |
| DSP Blocks | — | Hard floating-point capable |
| Configuration | — | Through HPS or FPGA fabric |
| Speed Grade | — | 3 (per device suffix) |