10AS066H4F34E3SG vs 10AS066H4F34E3LG 比較
詳細並排比較 10AS066H4F34E3SG 由 Altera 與 10AS066H4F34E3LG 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
10AS066H4F34E3LG - Arria 10 SX SoC FPGA 660K LE | Altera | Dual ARM Cortex-A9
10AS066H4F34E3LG ✓ 啟用中規格比較
| 參數 | 10AS066H4F34E3SG | 10AS066H4F34E3LG |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria 10 SX | Arria 10 SX SoC FPGA |
| Logic Elements | 660,000 | 660,000 |
| Process Technology | 20 nm | 20 nm |
| Core Voltage | 0.9 V | 0.9 V |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency | 1.5 GHz | — |
| 封裝 | 1152-FBGA, FC (35x35 mm) | 1152-FBGA, FC (35x35 mm) |
| Package Code | F34 | — |
| 安裝類型 | Surface Mount | Surface Mount (FCBGA) |
| 工作溫度 | [DATA_NEEDED: operating temperature grade] | — |
| Speed Grade | [DATA_NEEDED: speed grade] | — |
| Transceivers | [DATA_NEEDED: number of transceivers] | [DATA_NEEDED: transceiver count and rate] |
| Maximum User I/O | 492 | — |
| Embedded Memory | [DATA_NEEDED: M20K blocks total] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP block count] | [DATA_NEEDED: variable-precision DSP block count] |
| RoHS 狀態 | Compliant | Compliant |
| Hard Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| On-Chip ROM | — | 256 KB (bottom boot) |
| Pin / Ball Count | — | 1152 |
| I/O Count | — | 492 user I/O |
| Configuration Mode | — | Bottom boot |
| Temperature Grade | — | Industrial / Extended (per OPN suffix) |
| Lead-Free | — | Yes |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| Memory Interfaces | — | DDR3 / DDR4 / LPDDR2 hard controllers |
| Block Memory (M20K) | — | [DATA_NEEDED: M20K count and total Mb] |