10AX115U3F45I2SG vs 10AX115U2F45I2SG 比較
詳細並排比較 10AX115U3F45I2SG 由 Intel 與 10AX115U2F45I2SG 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
10AX115U2F45I2SG - Arria 10 GX FPGA, 1.15M LEs, 17.4G Transceivers | Altera
10AX115U2F45I2SG ✓ 啟用中規格比較
| 參數 | 10AX115U3F45I2SG | 10AX115U2F45I2SG |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | Arria 10 GX | — |
| Logic Elements | 1,150,000 | 1,150,000 |
| Embedded Memory (M20K) | 68,857,856 bits (67.5 Mbit) | — |
| Embedded Memory Blocks | 1,518 | — |
| DSP Blocks (18x19 Multipliers) | 1,518 | — |
| User I/O Pins | 480 | 480 |
| Transceivers | 24 channels | — |
| Max Transceiver Data Rate | 14.4 Gbps | — |
| Hard Memory Controller | Yes (DDR4 / DDR3 / QDRII+) | — |
| Process Technology | TSMC 20 nm | 20 nm |
| 封裝 | 1932-ball FCBGA (F45) | 1932-BBGA, FCBGA (45 x 45 mm) |
| Operating Temperature Grade | Industrial (-40C to +100C junction) | — |
| Speed Grade | I2 | — |
| Configuration Scheme | AES-256 encrypted, partial reconfiguration | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant | [DATA_NEEDED: rohs_status] |
| Lead-Free | Yes | — |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Family | — | Arria 10 GX |
| Adaptive Logic Modules (ALMs) | — | 427,200 |
| Embedded Memory (Bits) | — | 68,857,856 |
| Number of LABs/CLBs | — | 427,200 |
| Transceiver Data Rate (Chip-to-Chip) | — | up to 17.4 Gbps |
| Transceiver Data Rate (Backplane) | — | up to 12.5 Gbps |
| Core Voltage | — | 0.87 V to 0.98 V |
| 工作溫度 | — | -40C to +100C (TJ) |
| Temperature Grade | — | Industrial |
| Supplier Device Package | — | 1932-FCBGA |