27C512L-15T vs 27C512-20FA 比較
詳細並排比較 27C512L-15T 由 WaferScale Integration 與 27C512-20FA 由 NXP Semiconductors. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 27C512L-15T | 27C512-20FA |
|---|---|---|
| 品牌 | WaferScale Integration | NXP Semiconductors |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | CMOS UV/OTP EPROM | UV / OTP EPROM (non-volatile) |
| Density | 512 Kilobit (64K x 8) | — |
| 組織 | 64K x 8-bit | 64K x 8 |
| Access Time | 150 ns (-15 speed grade) | — |
| 供應電壓 | +5 V +/-10% | — |
| Programming Voltage (VPP) | +12.5 V | — |
| Programming Algorithm | 100% Flashrite programming | — |
| Standby Current (CMOS) | 20 uA typical | — |
| 介面 | Parallel | — |
| Pinout Standard | JEDEC-approved 27C512 pinout | — |
| 封裝 | 32-PLCC (T suffix) | — |
| 安裝類型 | Surface Mount | Through Hole |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| Active Current | [DATA_NEEDED: active read current] | — |
| 輸出類型 | Tri-state, 8-bit data bus (O0-O7) | Tri-state, 8-bit parallel |
| Address Inputs | A0-A15 (16 address lines) | A0 to A15 (16-bit address bus) |
| Control Signals | CE, OE, VPP | /CE (chip enable), /OE (output enable), /PGM |
| RoHS 狀態 | unknown | unknown |
| 記憶體容量 | — | 524,288 bit (512 Kbit) |
| Maximum Access Time | — | 200 ns |
| Supply Voltage Range | — | 4.5 V to 5.5 V |
| Technology | — | CMOS EPROM |
| Temperature Grade | — | Commercial |
| Number of Terminals | — | 28 |
| Package Code | — | DIP (rectangular) |
| Access Mode | — | Asynchronous |
| Operating Supply Nominal | — | 5 V |