5CSEBA2U19C7N vs 5CSEBA4U19C6N 比較

詳細並排比較 5CSEBA2U19C7N 由 Intel 與 5CSEBA4U19C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5CSEBA2U19C7N 5CSEBA4U19C6N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family Cyclone V SE SoC FPGA Cyclone V SE SoC FPGA
Logic Elements 25,000 LE 40,000 (40K LE)
Adaptive Logic Modules (ALMs) 9,430 ALM —
ALUTs 9,430 —
DSP Blocks 66 (variable-precision 18x18) Variable-precision DSP blocks (18x18 multipliers)
Embedded Memory 1,400 Kbits (M9K + MLAB) M10K memory blocks
HPS Processor Dual ARM Cortex-A9 MPCore with CoreSight —
HPS Maximum Clock Frequency 925 MHz —
L1 Cache (per core) 32 KB I-cache + 32 KB D-cache —
L2 Cache 512 KB shared —
User I/O Pins [DATA_NEEDED: exact user I/O count] —
封裝 484-pin UBGA (19x19 mm, 1.0 mm pitch) 484-pin UFBGA / UBGA (19x19 mm)
Speed Grade C7 —
工作溫度 Commercial / Industrial (TJ from data) 0C to +85C (commercial grade)
Process Technology TSMC 28 nm low-power TSMC 28 nm low-power
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
MSL 等級 [DATA_NEEDED: MSL rating] —
RoHS 狀態 Compliant Compliant
Hard Processor System (HPS) — Dual-core ARM Cortex-A9 MPCore with CoreSight
Maximum HPS Clock Frequency — 925 MHz
FPGA User I/O — 161 (per Altera product page)
Memory Controller — Hard controller for DDR2 / DDR3 / LPDDR2
Encryption Support — AES encryption (per LCSC listing)
Error Detection — SEU error detection and correction support

資料表與資源

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