5CSEBA4U19C6N vs 5CSEBA6U19C6N 比較

詳細並排比較 5CSEBA4U19C6N 由 Intel 與 5CSEBA6U19C6N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5CSEBA4U19C6N 5CSEBA6U19C6N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family Cyclone V SE SoC FPGA —
Logic Elements 40,000 (40K LE) 110K
Hard Processor System (HPS) Dual-core ARM Cortex-A9 MPCore with CoreSight —
Maximum HPS Clock Frequency 925 MHz —
封裝 484-pin UFBGA / UBGA (19x19 mm) 484-UBGA (UBGА, 19x19 mm)
FPGA User I/O 161 (per Altera product page) —
Process Technology TSMC 28 nm low-power TSMC 28 nm low-power
Memory Controller Hard controller for DDR2 / DDR3 / LPDDR2 —
DSP Blocks Variable-precision DSP blocks (18x18 multipliers) Variable-precision DSP
Embedded Memory M10K memory blocks —
Encryption Support AES encryption (per LCSC listing) —
Error Detection SEU error detection and correction support —
工作溫度 0C to +85C (commercial grade) -40C to +100C (industrial)
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 狀態 Compliant Compliant (per Altera/Intel product page)
Manufacturer — Altera (Intel)
Series — Cyclone V SE SoC FPGA
Device Variant — 5CSEA6 (U19 package)
HPS Architecture — Dual ARM Cortex-A9 MPCore with CoreSight
HPS Frequency — 925 MHz
FPGA Speed Grade — -6 (industrial)
腳位數 — 484
User I/O — 66 (per Heisener) / configurable LVDS/LVCMOS
Hard IP Blocks — PCIe Gen2, multi-port memory controller, ARM Cortex-A9 HPS
Memory — Embedded M10K blocks
MSL 等級 — 3 (per BGA package)

資料表與資源

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