5CSEBA6U19C7SN vs 5CSEBA6U19I7SN 比較
詳細並排比較 5CSEBA6U19C7SN 由 Intel 與 5CSEBA6U19I7SN 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5CSEBA6U19C7SN | 5CSEBA6U19I7SN |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | Cyclone V SE SoC FPGA | — |
| Family | 5CSEBA6 (Cyclone V SE, 110K LE) | Cyclone V SE SoC FPGA |
| Logic Elements | 110,000 | — |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Clock Frequency | 800 MHz | — |
| User I/O Pins | 66 (FPGA fabric, per distributor listing) | — |
| Total Package Pins | 484 | — |
| Package Type | 484-UBGA (Ultra BGA), 19x19 mm | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| 工作溫度 | Industrial grade (per part number code) | Industrial grade (I) -40C to +100C junction |
| RoHS 狀態 | Compliant | Compliant |
| Lead-Free | Yes | — |
| FPGA Process Node | Low-power TSMC process | — |
| On-Chip Memory | Embedded SRAM (FPGA fabric) | — |
| DSP Blocks | Variable-precision DSP blocks (Cyclone V architecture) | Variable-precision DSP blocks |
| Transceivers | Not enabled on this SE variant | — |
| Hard Processor System (HPS) | — | Single-core ARM Cortex-A9 MPCore with CoreSight |
| Logic Elements (LEs) | — | 110,000 |
| Logic Array Blocks (LABs) | — | 4150 |
| Maximum User I/Os | — | 66 |
| On-chip Memory | — | 64 KB |
| PLLs | — | Integrated phase-locked loops |
| HPS Maximum Frequency | — | 800 MHz |
| External Memory Support | — | DDR3, DDR3L, LPDDR2 (via HPS) |
| Process Technology | — | 28 nm low-power (TSMC) |
| 封裝 | — | 484-pin UBGA (19x19 mm) |
| Lead Free | — | Yes |
| Ordering Part Number | — | 5CSEBA6U19I7SN |