5CSEBA6U23I7N vs 5CSTFD6D5F31I7N 比較
詳細並排比較 5CSEBA6U23I7N 由 Intel 與 5CSTFD6D5F31I7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5CSEBA6U23I7N | 5CSTFD6D5F31I7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Cyclone V SE SoC FPGA | Cyclone V ST |
| Logic Elements | 110,000 | 110000 |
| Process Technology | 28 nm TSMC low-power | 28 nm low-power |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 800 MHz | — |
| DSP Blocks | 224 (variable-precision) | — |
| Embedded Memory | 5,662 Kbits (M10K + MLAB) | — |
| Maximum User I/O | 364 | 288 |
| 封裝 | 672-UBGA (UBG A-672) 23x23 mm | 896-ball FBGA (31x31 mm) |
| Core Voltage | 1.1 V | 1.1 V |
| 工作溫度 | -40C to +100C (industrial, junction) | -40C to +100C (Industrial) |
| Speed Grade | 7 | — |
| Temperature Grade | Industrial (I) | — |
| Lead-Free / RoHS | Yes (Pb-free, N suffix) | — |
| DDR Controller | 32-bit DDR3/LPDDR2 with ECC | — |
| Configuration | FPGA + HPS integrated SoC | — |
| Device Subfamily | — | SoC FPGA (with hard ARM Cortex-A9) |
| Hard Processor Cores | — | Dual ARM Cortex-A9 MPCore |
| Maximum Processor Frequency | — | 800 MHz |
| CoreSight Debug | — | Integrated |
| NEON Media Engine | — | Yes |
| Single/Double Precision FPU | — | Yes |
| 安裝類型 | — | Surface Mount (BGA) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |
| RoHS 狀態 | — | Compliant |