5CSXFC5D6F31I7N vs 5CSXFC5D6F31C8N 比較
詳細並排比較 5CSXFC5D6F31I7N 由 Intel 與 5CSXFC5D6F31C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
5CSXFC5D6F31C8N - Cyclone V SX SoC FPGA, 85K LE, Dual ARM Cortex-A9 | Intel
5CSXFC5D6F31C8N ✓ 啟用中規格比較
| 參數 | 5CSXFC5D6F31I7N | 5CSXFC5D6F31C8N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Cyclone V SX SoC FPGA | Cyclone V SX SoC FPGA |
| Logic Elements | 85,000 | 85K |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | 800 MHz | — |
| Core Voltage | 1.1 V | — |
| Process Technology | 28 nm low-power | 28 nm low-power |
| 封裝 | 896-ball FBGA (31 x 31 mm) | 896-FBGA (31x31 mm) |
| Package Pitch | 1.0 mm | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| 工作溫度 | -40 C to +100 C (Industrial, TJ) | 0C to +85C (commercial) |
| Memory Interfaces | DDR2, DDR3, LPDDR2 | — |
| DSP Blocks | 18 x 18 multipliers | [DATA_NEEDED: variable-precision DSP block count] |
| I/O Standards | LVDS, LVTTL, LVCMOS, RSDS | — |
| Transceivers | Present (Cyclone V SX transceiver variants) | — |
| MSL 等級 | 3 (per JEDEC J-STD-020, typical for BGA) | 3 |
| RoHS 狀態 | Compliant | Compliant |
| HPS Maximum Clock Frequency | — | 600 MHz |
| 記憶體類型 | — | FPGA fabric + ARM HPS on-die |
| Lead-Free | — | Yes |
| 無鹵素 | — | [DATA_NEEDED: halogen-free status] |
| Speed Grade | — | C8 |
| Device Variant | — | 5CSXFC5 (logic + transceivers + HPS) |
| I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Embedded Memory | — | [DATA_NEEDED: total embedded memory bits] |