5CSXFC6C6U23A7N vs 5CSXFC6C6U23C8N 比較

詳細並排比較 5CSXFC6C6U23A7N 由 Intel 與 5CSXFC6C6U23C8N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5CSXFC6C6U23A7N 5CSXFC6C6U23C8N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family Cyclone V SX SoC FPGA Cyclone V SX (SoC FPGA)
Logic Elements 110,000 110,000
Processor Subsystem Dual ARM Cortex-A9 MPCore with CoreSight —
Embedded Memory (M20K) 5,140 Kbit —
DSP Blocks (18x18) 224 —
Maximum User I/O 364 LVDS-capable pins 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O])
Transceivers 6 (up to 3.125 Gbps) Up to 3.125 Gbps integrated transceivers
封裝 672-pin UBGAFBGA (23 x 23 mm) 672-pin UFBGA (UBGA), 23x23 mm
Process Technology TSMC 28 nm Low Power 28 nm low-power (TSMC)
Core Voltage 1.1 V 1.1 V
Hard Memory Controller DDR2 / DDR3 / LPDDR2 with ECC —
HPS Clock Frequency Up to 925 MHz (per Cyclone V device datasheet) —
工作溫度 Automotive grade (per part number decode A) -40C to +100C (industrial grade, code C)
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 狀態 Compliant (per Intel product page) Compliant
MSL 等級 [DATA_NEEDED: moisture sensitivity level] 3 (per JEDEC J-STD-020, typical for large BGA)
Series — Cyclone V SX
Architecture — MCU + FPGA (Hard Processor System + FPGA fabric)
Hard Processor System (HPS) — Dual-core ARM Cortex-A9 MPCore with CoreSight
Processor Maximum Frequency — 600 MHz
HPS L1 Cache — 32 KB instruction + 32 KB data per core
HPS L2 Cache — 512 KB shared
DSP Blocks — Variable-precision DSP (number not specified in retrieved data)
Embedded Memory — M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits])
Memory Controller — Hard controller supporting DDR2, DDR3, LPDDR2
Lead-Free / Halogen-Free — Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no])
Speed Grade — C8 (commercial speed grade 8)
Lifecycle — Active (Cyclone V family in production)

資料表與資源

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