5M1270ZF256C5N vs 5M1270ZF324I5N 比較

詳細並排比較 5M1270ZF256C5N 由 Altera 與 5M1270ZF324I5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5M1270ZF256C5N 5M1270ZF324I5N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family MAX V —
Series 5M1270Z MAX V
Device Type CPLD - Complex Programmable Logic Device —
Macro Cells 980 —
Logic Elements (LE) 1270 —
User I/Os (Max) 212 —
Configuration Memory 8 Kbits User Flash Memory (UFM), non-volatile —
Maximum Operating Frequency 201.1 MHz —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltages (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) —
封裝 256-ball FBGA (FineLine BGA) 324-pin FBGA (FineLine BGA), 19 mm
安裝類型 Surface Mount Surface Mount
工作溫度 0 C to +85 C (Commercial) -40 °C to +100 °C (TJ)
Propagation Delay (tPD) [DATA_NEEDED: tPD max] —
Internal Oscillator Yes (on-chip, supports user logic) —
Programming Interface JTAG (IEEE 1149.1), ByteBlaster —
Process Node 0.30 µm —
RoHS 狀態 Compliant —
Device Family — 5M1270Z
Number of Macrocells — 980
Number of Logic Array Blocks (LABs) — 16
User I/Os — 271
Maximum Internal Frequency — 212 MHz
Pin-to-Pin Logic Delay (tPD) — 6.2 ns
Number of I/O Banks — 8
Core Voltage (VCCINT) — 1.8 V (1.71 V to 1.89 V)
I/O Voltage Standards Supported — 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (LVCMOS, LVTTL, SSTL)
Programmable Logic Type — In-System Programmable (ISP) flash-based CPLD
Configuration Interface — JTAG (IEEE 1149.1)
On-Chip User Flash Memory — 8 Kbits
Standby Current (typ, 25 °C) — 40 µA
RoHS Compliance — Compliant
Lead-Free — Yes

資料表與資源

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