5M160ZE64I5 vs 5M160ZE64A5N 比較
詳細並排比較 5M160ZE64I5 由 Intel 與 5M160ZE64A5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M160ZE64I5 | 5M160ZE64A5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | MAX V | — |
| Device Type | SPLD / CPLD | — |
| Logic Elements | 160 | 160 |
| User I/Os | 54 | — |
| Total Pins | 64 | — |
| 封裝 | EQFP-64 (Plastic, 9 x 9 mm, 0.40 mm pitch) | 64-pin EQFP (exposed-pad QFP) |
| 安裝類型 | Surface Mount (Gull Wing) | Surface Mount |
| Configuration Memory | Flash, non-volatile | — |
| Internal User Flash (UFM) | 8 Kbits | — |
| Internal Frequency (max) | 118.3 MHz | — |
| Propagation Delay (tPD, max) | 7.9 ns | — |
| Internal Frequency (typical) | 184 MHz | — |
| Supply Voltage VCCINT | 1.8 V (typ) | — |
| I/O Supply Voltage VCCIO | 1.2 V to 3.3 V (MultiVolt) | — |
| 工作溫度 | -40C to +100C (industrial, I-grade) | -40C to +125C (automotive AEC-Q100) |
| Programming Interface | JTAG (IEEE 1149.1) + ISP | JTAG (IEEE 1149.1) / ISP |
| RoHS 狀態 | Compliant | Compliant |
| Family | — | MAX V |
| Device | — | 5M160ZE64A5N |
| Macro Cells | — | 128 |
| User I/O Pins | — | 54 |
| Maximum Operating Frequency | — | 118.3 MHz |
| Pin-to-Pin Propagation Delay | — | 7.5 ns |
| User Flash Memory | — | 8 Kbits |
| Core Voltage (VCCINT) | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Voltage Support | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| Configuration Method | — | Non-volatile flash, instant-on |