5M240ZM68C5N vs 5M80ZM68C5N 比較
詳細並排比較 5M240ZM68C5N 由 Intel 與 5M80ZM68C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M240ZM68C5N | 5M80ZM68C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX V | — |
| Family | MAX V (5M240Z) | MAX V |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Architecture | Non-volatile flash-based | — |
| Macro Cells | 192 | — |
| Logic Elements | 240 | 64 |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Banks | MultiVolt I/O, 1.5/1.8/2.5/3.3 V compatible | — |
| Global Clocks | 4 | — |
| User Flash Memory | Yes (integrated) | 8 Kbits |
| 封裝 | 68-ball Micro FBGA (BGA-68) | 68-ball MBGA (Micro FineLine BGA), 5x5 mm |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度 | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial, C5) |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) in-system programmable |
| RoHS 狀態 | Compliant | Compliant |
| Macrocells | — | 64 |
| Maximum User I/O | — | 79 |
| Pin-to-Pin Delay (Tpd) | — | 7.5 ns |
| Internal Operating Frequency | — | 300 MHz (max) |
| Core Voltage | — | 1.8 V |
| I/O Bank Voltages | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Configuration Memory | — | Non-volatile flash (zero boot time) |