5M40ZE64C5N vs 5M40ZE64I5N 比較

詳細並排比較 5M40ZE64C5N 由 Altera 與 5M40ZE64I5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5M40ZE64C5N 5M40ZE64I5N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Series MAX V —
Device Type CPLD - Complex Programmable Logic Device —
Logic Elements (LE) 40 40
Macrocells 32 32
Maximum User I/Os 54 —
Propagation Delay (tPD1) 7.5 ns —
Maximum Internal Frequency 118.3 MHz [DATA_NEEDED: fMAX per datasheet]
Configuration Memory Flash (non-volatile) —
Supply Voltage - Core 1.8 V (internal) —
External Supply Voltage 3.3 V —
I/O Voltage Support 1.5 V / 1.8 V / 2.5 V / 3.3 V LVCMOS, LVTTL —
Programming Interface JTAG (IEEE 1149.1) - in-system programmable —
封裝 64-pin EQFP (Plastic Enhanced Thin QFP) with exposed thermal pad 64-pin EQFP (EQFP-64), 9 mm x 9 mm, 0.4 mm pitch
安裝類型 Surface Mount Surface Mount
工作溫度 0C to +85C (commercial) -40 °C to +100 °C (Industrial, I-suffix)
User Flash Memory (UFM) Yes (on-chip non-volatile) —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] —
Device Family — MAX V
Maximum User I/O Pins — [DATA_NEEDED: maximum user I/O count for 64-EQFP variant]
Propagation Delay (tPD) — 7.5 ns
Core Voltage (VCCINT) — 1.8 V
I/O Bank Voltage (VCCIO) — 1.2 V to 3.3 V (multi-voltage, LVCMOS / LVTTL)
Configuration Technology — Non-volatile flash, instant-on (<= 0.5 ms)
Standby Current — 25 µA (typical)
MSL 等級 — [DATA_NEEDED: MSL rating per JEDEC J-STD-020]
Lead-Free / RoHS — Lead free, plastic, RoHS compliant (per FindIC description)
JTAG Support — IEEE 1149.1 boundary-scan, in-system programmability
Toolchain — Quartus II (MAX V device support) / Quartus Prime

資料表與資源

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