5M40ZE64I5N vs 5M40ZE64C5N 比較
詳細並排比較 5M40ZE64I5N 由 Intel 與 5M40ZE64C5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M40ZE64I5N | 5M40ZE64C5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | MAX V | — |
| Logic Elements (LE) | 40 | 40 |
| Macrocells | 32 | 32 |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count for 64-EQFP variant] | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency | [DATA_NEEDED: fMAX per datasheet] | 118.3 MHz |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.2 V to 3.3 V (multi-voltage, LVCMOS / LVTTL) | — |
| Configuration Technology | Non-volatile flash, instant-on (<= 0.5 ms) | — |
| Standby Current | 25 µA (typical) | — |
| 工作溫度 | -40 °C to +100 °C (Industrial, I-suffix) | 0C to +85C (commercial) |
| 封裝 | 64-pin EQFP (EQFP-64), 9 mm x 9 mm, 0.4 mm pitch | 64-pin EQFP (Plastic Enhanced Thin QFP) with exposed thermal pad |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | — |
| Lead-Free / RoHS | Lead free, plastic, RoHS compliant (per FindIC description) | — |
| JTAG Support | IEEE 1149.1 boundary-scan, in-system programmability | — |
| Toolchain | Quartus II (MAX V device support) / Quartus Prime | — |
| Series | — | MAX V |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Maximum User I/Os | — | 54 |
| Propagation Delay (tPD1) | — | 7.5 ns |
| Configuration Memory | — | Flash (non-volatile) |
| Supply Voltage - Core | — | 1.8 V (internal) |
| External Supply Voltage | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVCMOS, LVTTL |
| Programming Interface | — | JTAG (IEEE 1149.1) - in-system programmable |
| User Flash Memory (UFM) | — | Yes (on-chip non-volatile) |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance status] |