5M570ZM100C5N vs 5M570ZM100A5N 比較
詳細並排比較 5M570ZM100C5N 由 Altera 與 5M570ZM100A5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M570ZM100C5N | 5M570ZM100A5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Product Family | MAX V CPLD | — |
| Series | 5M570Z | — |
| Logic Elements / Macro Cells | 440 | — |
| Maximum User I/O Pins | 74 | — |
| Maximum Operating Frequency (fMAX) | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 9 ns (typical, per datasheet) | — |
| Core Supply Voltage (VCCINT) | 1.8 V | 1.8 V |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Configuration Memory Type | Non-volatile Flash | — |
| 封裝 | 100-ball MBGA (Micro FineLine BGA), 0.5 mm pitch | 100-ball Micro BGA (MBGA, 6x6 mm) |
| 工作溫度 | 0C to +85C (commercial) | — |
| JTAG Support | IEEE 1149.1 boundary-scan + ISP | — |
| Programming Interface | JTAG / In-System Programming (Quartus II / Quartus Prime) | JTAG (IEEE 1149.1) / ISP |
| RoHS 狀態 | Compliant | Compliant |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Family | — | MAX V |
| Macrocells | — | 440 |
| User I/Os | — | 74 |
| Logic Elements | — | 570 |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells per LAB) |
| Maximum Internal Frequency | — | 118.3 MHz |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Standby Current | — | 27 uA (typical) |
| On-chip Oscillator | — | Yes |
| Non-volatile Configuration | — | Flash (instant-on) |
| Operating Temperature Grade | — | Industrial |
| Lead-Free | — | Yes |