5M570ZT100C4N vs 5M570ZT100A5N 比較
詳細並排比較 5M570ZT100C4N 由 Intel 與 5M570ZT100A5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M570ZT100C4N | 5M570ZT100A5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX V | MAX V |
| Device Logic Elements (Macrocells) | 440 | — |
| User I/Os | 74 | — |
| 封裝 | TQFP-100 (14x14 mm) | 100-pin TQFP |
| 腳位數 | 100 | — |
| Configuration Memory | Internal flash (non-volatile) | On-chip non-volatile flash |
| User Flash Memory | 8 Kbits (typical, MAX V) | Yes (on-chip) |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.2 V to 3.3 V (bank-dependent) | — |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Speed Grade | -4 | — |
| Programming Interface | JTAG (IEEE 1149.1) and in-system programmable | JTAG (IEEE 1149.1), in-system programmable (ISP) |
| Typical Static Current | approx. 2 mA | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 (168 hours) | — |
| RoHS 狀態 | Compliant | Compliant |
| Process Technology | 0.30 um 6-metal-layer flash CMOS | — |
| Logic Array Blocks (LABs) | Approx. 28 LABs (16 macrocells each) | 8 |
| Lead-Free / Halogen-Free | Yes | — |
| Device Logic Elements | — | 570 |
| Macrocells | — | 440 |
| Maximum User I/O Pins | — | 74 |
| Maximum Operating Frequency | — | 118.3 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 9.0 ns |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V (multi-voltage I/O banks) |
| Operating Temperature (A suffix) | — | -40C to +125C |
| Automotive Qualification | — | AEC-Q100 (per Arrow listing) |
| Internal Oscillator | — | Yes (on-chip) |