5M80ZM64C5N vs 5M80ZM64A5N 比較
詳細並排比較 5M80ZM64C5N 由 Altera 與 5M80ZM64A5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M80ZM64C5N | 5M80ZM64A5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture Family | MAX V | — |
| Macrocell Count | 64 macrocells | — |
| Propagation Delay | 7.5 ns | 14 ns |
| Maximum Internal Frequency | 118.3 MHz | — |
| User I/O Count | 30 I/Os | — |
| Programmable Logic Type | FLASH | — |
| Technology | CMOS | — |
| 封裝 | 64-MBGA | 64-ball Micro FBGA (MBGA) |
| Package Pin Count | 64 pins | — |
| 供應電壓 | [DATA_NEEDED: supply voltage] | — |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| RoHS 狀態 | unknown | Compliant |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| JTAG Support | [DATA_NEEDED: JTAG support] | IEEE 1149.1 boundary-scan |
| Family | — | MAX V |
| Device Logic Elements / Macrocells | — | 64 macrocells |
| Maximum Internal Operating Frequency | — | 118.3 MHz |
| User I/O Pins | — | 30 |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage Range | — | 1.2 V to 3.3 V (LVCMOS/LVTTL) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Logic Array Blocks (LABs) | — | 4 |
| Programmability | — | Flash (non-volatile), in-system via JTAG |
| Internal Oscillator | — | Yes |
| Terminal Pitch | — | 0.5 mm |
| 工作溫度 | — | -40 C to +105 C |
| Automotive Qualification | — | AEC-Q100 |
| 安裝類型 | — | Surface Mount |