74HC165D,652 vs 74HC165D,653 比較
詳細並排比較 74HC165D,652 由 Nexperia 與 74HC165D,653 由 Nexperia. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 74HC165D,652 | 74HC165D,653 |
|---|---|---|
| 品牌 | Nexperia | Nexperia |
| 類別 | Logic ICs | Logic ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Logic Type | Shift Register | Shift Register (Parallel-in/Serial-out) |
| 功能 | Parallel or Serial to Serial | Parallel or Serial to Serial |
| Number of Elements | 1 | 1 |
| Number of Bits per Element | 8 | 8 |
| 輸出類型 | Differential (complementary Q7 and Q7-bar) | Differential (Q7 and Q7-bar complementary outputs) |
| Supply Voltage (VCC) | 2 V to 6 V | 2 V to 6 V |
| Logic Family | 74HC (high-speed Si-gate CMOS) | — |
| Input Type | CMOS (HC); pin-compatible with TTL/LSTTL | — |
| 工作溫度 | -40 °C to +125 °C | -40 C to +125 C |
| 封裝 | 16-SOIC (SOT109-1), 0.154" (3.90 mm) width | 16-pin SOIC (SOT109-1) |
| 安裝類型 | Surface Mount | Surface Mount |
| 腳位數 | 16 | — |
| Standard Compliance | JEDEC standard no. 7A | — |
| Pin Compatible With | Low-power Schottky TTL (LSTTL) | — |
| Parallel Load | Asynchronous via SH/LD-bar | — |
| Serial Data Input | DS (for daisy-chaining) | — |
| Clock Input | CP (rising-edge triggered) with clock inhibit (CE-bar) | — |
| RoHS 狀態 | Compliant | Compliant |
| Input Voltage | — | 0 V to VCC |
| Output Drive (IO) | — | ±5.2 mA |
| Propagation Delay (tpd) | — | 6 ns typical at VCC = 5 V, CL = 50 pF [DATA_NEEDED: explicit propagation delay value] |
| MSL 等級 | — | 1 (per JEDEC J-STD-020) |
| JEDEC Compliance | — | JESD7A (per datasheet) |
| Pin Compatibility | — | LSTTL 74LS165 |
| Technology | — | High-speed Si-gate CMOS |