A42MX24-PLG84M vs A42MX24-2PLG84I 比較
詳細並排比較 A42MX24-PLG84M 由 Microchip Technology 與 A42MX24-2PLG84I 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip
A42MX24-2PLG84I ✓ 啟用中規格比較
| 參數 | A42MX24-PLG84M | A42MX24-2PLG84I |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MX (42MX) | MX (42MX) |
| System Gates | 36000 gates | 36000 gates |
| Logic Modules / Cells | 912 cells | — |
| Number of I/O | 72 | — |
| Technology | 0.45 um CMOS | 0.45 um antifuse |
| 供應電壓 | 3.3 V / 5 V | — |
| Core Voltage | 5 V | — |
| 封裝 | 84-PLCC (PLG84) | 84-PLCC (J-Lead) |
| 安裝類型 | Surface Mount (PLCC J-Lead) | Surface Mount |
| Programmability | Non-volatile, instantaneous power-up | One-Time Programmable (antifuse) |
| D-Modules (Wide Decode) | Yes | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40C to +85C (Industrial) |
| Speed Grade | [DATA_NEEDED: speed grade suffix detail] | -2 |
| MSL 等級 | [DATA_NEEDED: MSL] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Lead Free (per Kynix listing) |
| Application | Single-chip ASIC alternative, legacy PLD integration | — |
| Logic Cells | — | 912 cells |
| User I/O | — | 72 |
| Core Architecture Voltage | — | 5.0 V |
| I/O Voltage Support | — | 3.3 V / 5.0 V mixed |
| Configuration | — | No external boot device required |
| Dedicated Decode Blocks | — | D-modules (wide-input AND, CPLD-like) |
| Packaging | — | Tray |
| Primary Applications | — | ASIC alternative, legacy PLD integration |