AD9609XCPZ-40 vs AD9609BCPZ-80 比較
詳細並排比較 AD9609XCPZ-40 由 Analog Devices 與 AD9609BCPZ-80 由 Analog Devices. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | AD9609XCPZ-40 | AD9609BCPZ-80 |
|---|---|---|
| 品牌 | Analog Devices | Analog Devices |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 10 bits | — |
| Sample Rate (Speed Grade) | 40 MSPS | — |
| Number of Channels | 1 | 1 |
| Supply Voltage (Analog) | 1.8 V | — |
| Architecture | Multi-stage differential pipeline | Pipelined |
| Input Type | Differential | Single-ended / differential |
| Reference | Internal 1.0 V (external override option) | — |
| Sample-and-Hold Bandwidth | [DATA_NEEDED: full-power input bandwidth in MHz] | — |
| Digital Output Interface | CMOS, parallel | — |
| Output Coding | [DATA_NEEDED: binary or two's complement] | — |
| 工作溫度範圍 | -40 C to +85 C (industrial, per ADI product family) | -40 °C to +85 °C |
| Power Dissipation | [DATA_NEEDED: power in mW at 40 MSPS] | — |
| 封裝 | 32-LFCSP (5 mm x 5 mm) with exposed pad | 32-LFCSP-VQ (5x5 mm) with exposed pad |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | Compliant | Compliant |
| MSL 等級 | 3 (per JEDEC J-STD-020, reflow at 260 C) | — |
| Family | AD9609 (20/40/65/80 MSPS speed grades) | — |
| Number of Bits | — | 10 bit |
| 取樣率 | — | 80 MSPS |
| Sampling Rate (Family Options) | — | 20 / 40 / 65 / 80 MSPS (selected by part suffix) |
| Analog Supply Voltage | — | 1.8 V |
| Digital Output Supply | — | 3.3 V |
| Data Interface | — | Serial, SPI™ control port; parallel or 1-pair LVDS data output |
| On-chip Reference | — | Yes (1.0 V typical, external-reference option) |
| SNR (fIN = 9.7 MHz) | — | 61.5 dBFS |
| SNR (fIN = 200 MHz) | — | 61.0 dBFS |
| SFDR (fIN = 9.7 MHz) | — | 75 dBc |
| SFDR (fIN = 200 MHz) | — | 73 dBc |
| Power-Down Pin | — | SDIO/PDWN (CMOS-compatible) |
| Pin Compatibility | — | Pin-compatible with AD9629 (12-bit) and AD9649 (14-bit) families |
| Packaging (Shipping) | — | Tray |