ADC1213D105HN-C1 vs ADC1213D125HN-C1 比較

詳細並排比較 ADC1213D105HN-C1 由 Renesas Electronics 與 ADC1213D125HN-C1 由 NXP Semiconductors. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Renesas Electronics
ADC1213D105HN-C1 ADC1213D105HN-C1 - Dual 12-bit 105MSPS ADC | Renesas | JESD204A

ADC1213D105HN-C1 - Dual 12-bit 105MSPS ADC | Renesas | JESD204A

ADC1213D105HN-C1 ✓ 啟用中
NXP Semiconductors
ADC1213D125HN-C1 ADC1213D125HN-C1 - Dual 12-bit 125 Msps ADC w/ JESD204A | NXP

ADC1213D125HN-C1 - Dual 12-bit 125 Msps ADC w/ JESD204A | NXP

ADC1213D125HN-C1 ✓ 啟用中

規格比較

參數 ADC1213D105HN-C1 ADC1213D125HN-C1
品牌 Renesas Electronics NXP Semiconductors
類別 ADC/DAC ADC/DAC
生命週期狀態 啟用中 啟用中
解析度 12 bits per channel (dual channel) —
Sample Rate (per channel) 105 MSPS —
Family Speed Grades 65 / 80 / 105 / 125 MSPS —
Number of Channels 2 (simultaneous sampling) 2 (dual)
Architecture Pipelined Pipelined with per-channel sample-and-hold
Data Interface Serial JESD204A Serial JESD204A (subclass 0)
封裝 56-VFQFPN (8x8 mm) with EP 56-HVQFN exposed pad (8x8 mm)
腳位數 56 —
Analog Supply Voltage 1.8 V (typical) 1.8 V
Digital Supply Voltage 1.8 V (typical) 1.8 V
工作溫度範圍 -40C to +85C (industrial) [DATA_NEEDED: exact grade] [DATA_NEEDED: operating temperature range]
Input Type Differential analog inputs Differential analog inputs (per channel)
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: MSL rating from datasheet] —
RoHS 狀態 Compliant Compliant
Number of Bits — 12 bit
取樣率 — 125 Msps (also 65/80/105 Msps modes)
JESD204A Lanes — 2 lanes, up to 1.25 Gbps per lane
Internal Voltage Reference — Yes (on-chip)
Per-Channel Gain Adjustment — Yes (programmable)
Power Consumption — [DATA_NEEDED: typical power at 125 Msps]

資料表與資源

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