ADC1213D125HN-C1 vs ADC1213D105HN-C1 比較
詳細並排比較 ADC1213D125HN-C1 由 NXP Semiconductors 與 ADC1213D105HN-C1 由 Renesas Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
NXP Semiconductors
ADC1213D125HN-C1 - Dual 12-bit 125 Msps ADC w/ JESD204A | NXP
ADC1213D125HN-C1 ✓ 啟用中Renesas Electronics
ADC1213D105HN-C1 - Dual 12-bit 105MSPS ADC | Renesas | JESD204A
ADC1213D105HN-C1 ✓ 啟用中規格比較
| 參數 | ADC1213D125HN-C1 | ADC1213D105HN-C1 |
|---|---|---|
| 品牌 | NXP Semiconductors | Renesas Electronics |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Number of Bits | 12 bit | — |
| Number of Channels | 2 (dual) | 2 (simultaneous sampling) |
| 取樣率 | 125 Msps (also 65/80/105 Msps modes) | — |
| Data Interface | Serial JESD204A (subclass 0) | Serial JESD204A |
| JESD204A Lanes | 2 lanes, up to 1.25 Gbps per lane | — |
| Architecture | Pipelined with per-channel sample-and-hold | Pipelined |
| Analog Supply Voltage | 1.8 V | 1.8 V (typical) |
| Digital Supply Voltage | 1.8 V | 1.8 V (typical) |
| Input Type | Differential analog inputs (per channel) | Differential analog inputs |
| 封裝 | 56-HVQFN exposed pad (8x8 mm) | 56-VFQFPN (8x8 mm) with EP |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) [DATA_NEEDED: exact grade] |
| Internal Voltage Reference | Yes (on-chip) | — |
| Per-Channel Gain Adjustment | Yes (programmable) | — |
| Power Consumption | [DATA_NEEDED: typical power at 125 Msps] | — |
| RoHS 狀態 | Compliant | Compliant |
| 解析度 | — | 12 bits per channel (dual channel) |
| Sample Rate (per channel) | — | 105 MSPS |
| Family Speed Grades | — | 65 / 80 / 105 / 125 MSPS |
| 腳位數 | — | 56 |
| MSL 等級 | — | [DATA_NEEDED: MSL rating from datasheet] |