ADS62P22IRGC25 vs ADS62P25IRGC25 比較
詳細並排比較 ADS62P22IRGC25 由 Texas Instruments 與 ADS62P25IRGC25 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Texas Instruments
ADS62P25IRGC25 - Dual 12-Bit 125 MSPS ADC, 64-VQFN | Texas Instruments
ADS62P25IRGC25 ✓ 啟用中規格比較
| 參數 | ADS62P22IRGC25 | ADS62P25IRGC25 |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 12 bit | 12 bit |
| Number of Channels | 2 | 2 |
| Sampling Rate (max) | 65 MSPS per channel | — |
| Architecture | Pipeline | Pipelined |
| Input Type | Differential | Differential analog |
| Data Interface | CMOS / DDR LVDS (selectable) | — |
| 封裝 | 64-pin VQFN (RGC) 9x9 mm | 64-pin VQFN (RGC), 9x9 mm |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度範圍 | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| Supply Voltage - Analog (AVDD) | 3.3 V (typical) | — |
| Supply Voltage - Digital (DRVDD) | 1.8 V to 3.3 V (typical) | — |
| Channel-to-Channel Crosstalk | 95 dB | 95 dB |
| Coarse Gain | 3.5 dB | 3.5 dB |
| Fine Gain Adjustment | 0.05 dB steps up to 6 dB | — |
| Digital Processing | Offset correction, fine gain correction | — |
| RoHS 狀態 | Compliant | Compliant |
| MSL 等級 | 3 | [DATA_NEEDED: MSL Level] |
| Maximum Sample Rate | — | 125 MSPS |
| Output Interface | — | Parallel CMOS or DDR LVDS (selectable) |
| No Missing Codes | — | 12-bit (guaranteed) |
| Programmable Fine Gain | — | up to 6 dB |
| Digital Processing Block | — | Offset correction, fine gain correction (0.05 dB steps) |
| Clock Input | — | Integrated low-jitter clock buffer |