ADS62P44IRGC25 vs ADS62P22IRGC25 比較
詳細並排比較 ADS62P44IRGC25 由 Texas Instruments 與 ADS62P22IRGC25 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | ADS62P44IRGC25 | ADS62P22IRGC25 |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 14 bit | 12 bit |
| Number of Channels | 2 (dual) | 2 |
| Sample Rate (max) | 105 MSPS | — |
| Architecture | Pipelined | Pipeline |
| Input Bandwidth | 2.3 GHz | — |
| SNR | 72.4 dBFS at 70 MHz input | — |
| SFDR | 85 dBc at 70 MHz input | — |
| ENOB | [DATA_NEEDED: ENOB at f_in] | — |
| Aperture Jitter | 150 fs RMS | — |
| Analog Supply Voltage | 3.3 V | — |
| Digital Supply Voltage | 1.8 V | — |
| Power Dissipation | [DATA_NEEDED: power per channel at 105 MSPS] | — |
| 工作溫度範圍 | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| 封裝 | 64-VQFN (RGC) 9x9 mm with exposed pad | 64-pin VQFN (RGC) 9x9 mm |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 (168 hours) | 3 |
| RoHS 狀態 | Compliant | Compliant |
| Output Interface | Selectable DDR LVDS or parallel CMOS | — |
| Programmable Gain | 0 dB to 6 dB, 1 dB steps | — |
| Differential Clock Input | Yes (LVPECL/LVDS compatible) | — |
| Sampling Rate (max) | — | 65 MSPS per channel |
| Input Type | — | Differential |
| Data Interface | — | CMOS / DDR LVDS (selectable) |
| Supply Voltage - Analog (AVDD) | — | 3.3 V (typical) |
| Supply Voltage - Digital (DRVDD) | — | 1.8 V to 3.3 V (typical) |
| Channel-to-Channel Crosstalk | — | 95 dB |
| Coarse Gain | — | 3.5 dB |
| Fine Gain Adjustment | — | 0.05 dB steps up to 6 dB |
| Digital Processing | — | Offset correction, fine gain correction |