ADS62P44IRGC25 vs ADS62P23IRGC25 比較
詳細並排比較 ADS62P44IRGC25 由 Texas Instruments 與 ADS62P23IRGC25 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | ADS62P44IRGC25 | ADS62P23IRGC25 |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 14 bit | 12 bit |
| Number of Channels | 2 (dual) | 2 (dual) |
| Sample Rate (max) | 105 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Bandwidth | 2.3 GHz | — |
| SNR | 72.4 dBFS at 70 MHz input | — |
| SFDR | 85 dBc at 70 MHz input | — |
| ENOB | [DATA_NEEDED: ENOB at f_in] | — |
| Aperture Jitter | 150 fs RMS | — |
| Analog Supply Voltage | 3.3 V | — |
| Digital Supply Voltage | 1.8 V | — |
| Power Dissipation | [DATA_NEEDED: power per channel at 105 MSPS] | — |
| 工作溫度範圍 | -40C to +85C (industrial) | -40C to +85C (industrial) |
| 封裝 | 64-VQFN (RGC) 9x9 mm with exposed pad | 64-VQFN (RGC) 9x9 mm |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 (168 hours) | 3 (168 hours) |
| RoHS 狀態 | Compliant | Compliant |
| Output Interface | Selectable DDR LVDS or parallel CMOS | DDR LVDS or Parallel CMOS (selectable) |
| Programmable Gain | 0 dB to 6 dB, 1 dB steps | — |
| Differential Clock Input | Yes (LVPECL/LVDS compatible) | — |
| Manufacturer | — | Texas Instruments |
| Sampling Rate (Max) | — | 80 MSPS |
| Input Type | — | Differential analog inputs |
| Max Analog Input Voltage | — | 2 V |
| Internal Reference | — | Yes (external reference also supported) |
| Family Member Context | — | ADS62P2X family (65/80/105/125 MSPS versions) |
| Product Family | — | ADS62P2X |